EPM9560RC240-15C vs EPM9560ARC240-10N 比較
詳細並排比較 EPM9560RC240-15C 由 Intel 與 EPM9560ARC240-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N Obsolete規格比較
| 參數 | EPM9560RC240-15C | EPM9560ARC240-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD | — |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | — |
| Logic Array Blocks | 20 | — |
| User I/O Pins | 187 | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | 10 ns |
| 供應電壓 | 5.0 V | — |
| Operating Voltage Range | 3.3 V or 5 V | — |
| 封裝 | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (32x32 mm) |
| Terminal Pitch | 0.5 mm | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +70C (Commercial) | 0°C to +70°C (Commercial) |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| Process Technology | CMOS | CMOS EEPROM |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Non-RoHS (legacy Altera part) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Logic Family | — | MAX 9000 (CPLD) |
| Macro Cells | — | 560 |
| User I/Os | — | 191 |
| Logic Array Blocks (LABs) | — | 16 |
| Internal Frequency (fMAX) | — | 145 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programming Interface | — | IEEE 1149.1 JTAG / ByteBlaster |
| Programmability | — | In-system, EEPROM-based (non-volatile) |
| I/O Standard | — | 5.0 V TTL-compatible |