EPM9560RC304-10 vs EPM9560RC30415 比較
詳細並排比較 EPM9560RC304-10 由 Intel 與 EPM9560RC30415 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC304-10 | EPM9560RC30415 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 16000 | 12,000 |
| Logic Elements | 560 | — |
| 封裝 | RQFP-304 (RC) | 304-RQFP (Power Quad Flat Pack) |
| 腳位數 | 304 | 304 |
| Pin-to-Pin Propagation Delay | 12 ns | — |
| Speed Grade | -10 | -15 (15 ns pin-to-pin delay) |
| 供應電壓 | 5 V | 5.0 V |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| User I/O Pins | 304 (package-limited) | 360 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 (168 Hours) | — |
| RoHS 狀態 | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Architecture | — | Multiple Array MatriX (MAX), EEPROM-based |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 (40 macro cells each) |
| Maximum Internal Frequency | — | 117.6 MHz |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Technology | — | CMOS EEPROM |