EPM9560RI304-20N vs EPM9560RI304-15N 比較
詳細並排比較 EPM9560RI304-20N 由 Intel 與 EPM9560RI304-15N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM9560RI304-15N - 560-Macrocell MAX 9000 CPLD, 15ns, RQ304 | Altera
EPM9560RI304-15N Obsolete規格比較
| 參數 | EPM9560RI304-20N | EPM9560RI304-15N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (EE PLD), in-system programmable, EEPROM-based |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | — |
| Logic Array Blocks (LABs) | 35 | 16 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | — |
| Internal Performance Grade | 100 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Process Technology | CMOS EEPROM-based | High-performance CMOS, EEPROM configuration memory |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| 封裝 | 304-pin RQFP (Plastic Quad Flat Pack) | RQFP-304 (HFQFP-304), 1.27 mm gull-wing pitch |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | -40C to +85C (industrial; verify per lot) | — |
| RoHS 狀態 | Unknown (legacy Altera part - confirm per lot) | — |
| Series / Part Number | — | EPM9560 |
| Flip-Flops | — | 772 |
| User I/Os | — | 216 |
| Maximum Internal Frequency | — | 145 MHz |
| Propagation Delay (pin-to-pin) | — | 15 ns (speed grade -15) |
| 供應電壓 | — | 5.0 V core, multi-volt I/O (3.3 V / 5.0 V) |
| 腳位數 | — | 304 |
| Operating Temperature (commercial) | — | 0 C to 70 C |
| Programming Interface | — | JTAG (IEEE 1532 / IEEE 1149.1) in-system programmable |
| Architecture | — | Multiple Array MatriX (MAX), third-generation, PIA interconnect |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status of EPM9560RI304-15N] |