H5ANAG8NCR-PBC vs H5ANAG8NCJR-XNC 比較
詳細並排比較 H5ANAG8NCR-PBC 由 SK hynix 與 H5ANAG8NCJR-XNC 由 SK hynix. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | H5ANAG8NCR-PBC | H5ANAG8NCJR-XNC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 類別 | DRAM | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 庫存狀態 | — | In Stock |
| 單價 (USD) | — | $65.63 |
| Memory Density | 16Gb (2 GB) | — |
| 記憶體類型 | DDR4 SDRAM | DDR4 SDRAM |
| 組織 | x8 | 2G x 8 |
| 供應電壓 | 1.2 V (typical, DDR4 class) | — |
| 介面類型 | Parallel, DDR4 (Double Data Rate 4) | — |
| 封裝 | FBGA-78 (approximately 7.5 x 11 mm) | FBGA-78 (7.5 x 11 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade Code | -PBC (SK hynix speed/temperature code; exact Mbps bin [DATA_NEEDED: speed bin value]) | — |
| Clock Frequency | [DATA_NEEDED: clock frequency] | — |
| CAS 延遲 | [DATA_NEEDED: CAS latency] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +95C |
| Bank Group Architecture | Yes (DDR4 bank groups) | — |
| On-Die Termination (ODT) | Yes (DDR4 standard feature) | — |
| Self-Refresh | Yes (DDR4 standard feature) | — |
| RoHS 狀態 | Compliant (Lead-Free & Halogen-Free per SK hynix family datasheet) | Compliant |
| Process Technology | CMOS | — |
| Application Class | Main memory (server, industrial, networking, PC) | — |
| Density | — | 16 Gbit |
| 資料速率 | — | 3200 MT/s (DDR4-3200) |
| Supply Voltage (VDD) | — | 1.2 V |
| Process Node | — | 1z nm (non-EUV) |
| Die Bit Density | — | 0.296 Gb/mm2 |
| Peak Bandwidth (per 64-bit channel) | — | 25.6 GB/s at DDR4-3200 |
| CAS Latency (CL) | — | [DATA_NEEDED: CAS Latency] |
| Refresh | — | [DATA_NEEDED: refresh specification] |
| Base Part Number Family | — | H5ANAG8NCJR (16Gb DDR4 CMOS SDRAM) |
| Speed Grade Suffix | — | -XNC (0~95C commercial) |