K3KCKC0BM-JGCT vs K3K8K80BM-JGCT 比較
詳細並排比較 K3KCKC0BM-JGCT 由 Samsung Electronics 與 K3K8K80BM-JGCT 由 Samsung Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Samsung Electronics
K3K8K80BM-JGCT - Samsung LPDDR DRAM Memory IC | Samsung Electronics
K3K8K80BM-JGCT ✓ 啟用中規格比較
| 參數 | K3KCKC0BM-JGCT | K3K8K80BM-JGCT |
|---|---|---|
| 品牌 | Samsung Electronics | Samsung Electronics |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | LPDDR5 SDRAM | Low Power DRAM (LPDDR) component |
| Density | 64 Gb | [DATA_NEEDED: die density in Gb] |
| 介面 | LPDDR5 (Low Power Double Data Rate 5) | [DATA_NEEDED: LPDDR4X or LPDDR5] |
| 組織 | [DATA_NEEDED: organization (x32/x16)] | [DATA_NEEDED: x8/x16 organization] |
| Package Type | FBGA (fine-pitch ball grid array) | FBGA (Ball Grid Array) |
| Ball Count | [DATA_NEEDED: ball count] | [DATA_NEEDED: package ball count] |
| Speed Grade Suffix | JGCT | J (per Samsung speed-grade coding) |
| Max Pin Speed (family reference K3LKCKC0BM-MGCP) | 6400 Mbps | — |
| Supply Voltage Core (VDD1) | [DATA_NEEDED: VDD1 voltage] | — |
| Supply Voltage I/O (VDD2/VDDQ) | [DATA_NEEDED: VDDQ voltage] | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount | Surface Mount |
| Refresh Mode | Self-refresh with partial array self-refresh (PASR) | — |
| Power Features | DVFSC, deep power-down | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance] |
| Packaging | [DATA_NEEDED: packing type and standard quantity] | — |
| Manufacturer | — | Samsung Electronics |
| Product Family | — | K3K mobile DRAM (LPDDR) component series |
| Maximum Data Rate | — | [DATA_NEEDED: Mbps] |
| Supply Voltage (VDD) | — | [DATA_NEEDED: core supply voltage] |
| Supply Voltage (VDDQ) | — | [DATA_NEEDED: I/O supply voltage] |
| Packing Suffix | — | CT (per Samsung packing-code convention) |
| MSL 等級 | — | [DATA_NEEDED: moisture sensitivity level] |