LTC2257CUJ-14 vs LTC2150CUJ-14 比較
詳細並排比較 LTC2257CUJ-14 由 Analog Devices 與 LTC2150CUJ-14 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Analog Devices
LTC2257CUJ-14 - 14-Bit 40Msps Ultralow Power ADC | Analog Devices
LTC2257CUJ-14 ✓ 啟用中Analog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ 啟用中規格比較
| 參數 | LTC2257CUJ-14 | LTC2150CUJ-14 |
|---|---|---|
| 品牌 | Analog Devices | Analog Devices |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 14 bit |
| Sample Rate | 40 Msps | 170 Msps |
| Architecture | Pipelined | Pipelined |
| Number of Inputs | 1 | — |
| Supply Voltage (Analog) | 1.8 V (typ) | — |
| Power Dissipation | 49 mW at 40 Msps | — |
| Input Range (selectable) | 1 Vp-p to 2 Vp-p | — |
| Full-Power Input Bandwidth | 800 MHz | — |
| INL (typical) | ±1 LSB | ±0.85 LSB |
| DNL (typical) | ±0.3 LSB | ±0.25 LSB |
| Transition Noise | 1.13 LSB RMS | 1.82 LSBRMS |
| Missing Codes Over Temperature | None | — |
| Digital Outputs | Full-rate CMOS / DDR CMOS / DDR LVDS (selectable) | — |
| Output Supply Range (OVDD) | 1.2 V to 1.8 V | — |
| Configuration Interface | Serial SPI port | Serial SPI port |
| Power-Saving Modes | Shutdown and Nap | Sleep and Nap modes |
| Optional Features | Data output randomizer, clock duty cycle stabilizer | — |
| 封裝 | 40-pin QFN (6 mm × 6 mm) | 40-QFN (6 mm × 6 mm) with exposed pad |
| 安裝類型 | Surface Mount | Surface Mount |
| Compliance | RoHS compliant (Pb-free #PBF suffix) | — |
| Number of Channels | — | 1 |
| Analog Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| Missing Codes | — | None over temperature |
| Full-Power Sample/Hold Bandwidth | — | 1.25 GHz |
| Digital Output Interface | — | DDR LVDS |
| Encode Clock Inputs | — | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) |
| Clock Duty-Cycle Stabilizer | — | Optional (selectable) |
| Latency | — | 5 clock cycles |
| RoHS 狀態 | — | Compliant (Pb-free #PBF suffix) |