RTAX1000SL-CQ352V vs RTAX2000SL-1CQ352PROTO 比較
詳細並排比較 RTAX1000SL-CQ352V 由 Microchip Technology 與 RTAX2000SL-1CQ352PROTO 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX1000SL-CQ352V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CQ352V ✓ 啟用中Microchip Technology
RTAX2000SL-1CQ352PROTO - 2M-Gate Rad-Tolerant FPGA | Actel
RTAX2000SL-1CQ352PROTO ✓ 啟用中規格比較
| 參數 | RTAX1000SL-CQ352V | RTAX2000SL-1CQ352PROTO |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | RTAX-SL (RTAX-S/SL Radiation-Tolerant FPGAs) | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | 1,000,000 | 2,000,000 |
| CLBs (Logic Modules) | 12,096 | — |
| Logic Cells | 18,144 | 32,256 |
| Maximum Toggle Frequency | 581 MHz | — |
| Process Technology | 0.15 um CMOS | CMOS, antifuse interconnect |
| Core Voltage | 1.5 V | [DATA_NEEDED: core supply voltage] |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight qualified family | Radiation-tolerant (space-flight qualified family) |
| Power-Up Behavior | Live at power-up (non-volatile) | — |
| Configuration Upset Immunity | No SEU in configuration memory (antifuse) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with FIFO control logic |
| 封裝 | 352-pin Ceramic CQFP (CQ352V) | CQFP-352 (ceramic quad flat pack) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range for PROTO variant] |
| I/O Voltage | [DATA_NEEDED: I/O bank voltage range] | [DATA_NEEDED: I/O supply voltage] |
| Total Ionizing Dose (TID) | [DATA_NEEDED: TID rating in krad (Si)] | — |
| MSL 等級 | [DATA_NEEDED: moisture sensitivity level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Estimated Equivalent Gates per CLB | [DATA_NEEDED: gates-per-CLB ratio] | — |
| Configurable Logic Blocks (CLBs) | — | 21,504 |
| ASIC Gate Equivalent | — | 250,000 |
| Terminal Pitch | — | 0.500 mm |
| Programmability | — | One-Time Programmable (antifuse, OTP) |
| Configuration | — | Live at power-up, single-chip |
| Variant Designation | — | PROTO (prototyping device) |