RTAX4000SL-LG1272V vs RTAX4000SL-LG1272E 比較
詳細並排比較 RTAX4000SL-LG1272V 由 Microchip Technology 與 RTAX4000SL-LG1272E 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ 啟用中Microchip Technology
RTAX4000SL-LG1272E - 4M-Gate Rad-Tolerant FPGA LGA-1272 | Microchip
RTAX4000SL-LG1272E ✓ 啟用中規格比較
| 參數 | RTAX4000SL-LG1272V | RTAX4000SL-LG1272E |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Logic Cells | 60480 | 60,480 |
| CLBs | 40320 | — |
| Equivalent System Gates | 4000000 | — |
| Family | RTAX-S/SL and RTAX-DSP | RTAX-SL Radiation-Tolerant FPGA |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight grade | Radiation-tolerant (spaceflight class) |
| Power-Up Mode | Live at power-up (LAPU) | — |
| Form Factor | True single-chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks | — |
| Routing | Chip-wide highway routing, carry logic | — |
| Base Architecture | Microsemi Axcelerator commercial family | — |
| 封裝 | 1272-pin ceramic LG (CGA) package | 1272-Pin LGA (Ceramic Column) |
| 安裝類型 | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | Space-flight systems |
| RoHS 狀態 | [DATA_NEEDED: RoHS Status] | — |
| 工作溫度 | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: operating temperature range] |
| Core Voltage | [DATA_NEEDED: Core Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded SRAM Bits | [DATA_NEEDED: Embedded SRAM Bits] | — |
| Equivalent Gates | — | 4,000,000 |
| CLBs (Logic Modules) | — | 40,320 |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| Programmable Technology | — | Antifuse |
| Configuration | — | Live at power-up, single-chip |
| Packaging | — | Box |
| Max Combinatorial Delay per CLB | — | [DATA_NEEDED: max combinatorial delay for base speed grade] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |