THS1230CDWG4 vs THS1230CDWR 比較
詳細並排比較 THS1230CDWG4 由 Texas Instruments 與 THS1230CDWR 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | THS1230CDWG4 | THS1230CDWR |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 12 bits | 12 bits |
| Sampling Rate (Max) | 30 MSPS | — |
| Number of Channels | 1 | 1 |
| Conversion Time (Max) | 0.033 us (approx. 33 ns) | — |
| Architecture | Pipelined, multi-stage | Pipelined / multi-stage with digital error correction |
| Data Interface | Parallel CMOS | — |
| Analog Input Configuration | Differential or single-ended | — |
| Nominal Supply Voltage | 3.3 V | — |
| Power-Down Feature | Yes (dedicated PD pin) | — |
| 工作溫度範圍 | 0C to +70C | — |
| 封裝 / 外殼 | 28-SOIC (DW), 0.295" / 7.50 mm width | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (G4 green finish, RoHS compliant) | — |
| MSL 等級 | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Differential Nonlinearity (DNL) | [DATA_NEEDED: DNL in LSB] | — |
| Signal-to-Noise Ratio (SNR) | [DATA_NEEDED: SNR dBFS at fin and Fs] | — |
| Sample Rate | — | 30 MSPS |
| Supply Voltage (AVDD) | — | 3.3 V (single supply) |
| Input Type | — | Configurable: single-ended, single-ended with offset, or differential |
| Analog Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc at fIN] |
| INL | — | [DATA_NEEDED: INL LSB] |
| DNL | — | [DATA_NEEDED: DNL LSB] |
| Power Dissipation | — | <250 mW at 30 MSPS (typical) |
| Power-Down Mode | — | Yes (hardware PD pin) |
| Digital Output | — | CMOS, parallel 12-bit |
| 工作溫度 | — | 0 °C to +70 °C (C-grade commercial) |
| 封裝 | — | 28-pin SOIC (DW), 7.50 mm body width, tape and reel |
| RoHS 狀態 | — | Compliant |
| Reference | — | Internal (external reference option) |