XA7A12T-2CSG325I vs XC7A12T-2CSG325I 比較
詳細並排比較 XA7A12T-2CSG325I 由 AMD 與 XC7A12T-2CSG325I 由 AMD. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XA7A12T-2CSG325I | XC7A12T-2CSG325I |
|---|---|---|
| 品牌 | AMD | AMD |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Artix-7 XA (Automotive) | — |
| Logic Cells | 12800 | 12,800 cells |
| Configurable Logic Blocks (Slices) | 2000 | — |
| Distributed RAM | 125 Kb | — |
| DSP48E1 Slices | 40 | — |
| Block RAM Blocks | 20 x 36 Kb | — |
| Total Block RAM | 737280 bits | — |
| User I/O | 150 | 150 I/Os |
| 封裝 | 324-LFBGA, CSPBGA (CSG325) | 324-LFBGA CSBGA |
| Speed Grade | -2 | — |
| Core Supply Voltage (VCCINT) | 1.0 V | — |
| I/O Voltage Range (HR Banks) | 1.2 V to 3.3 V | — |
| Operating Temperature (Tj) | -40 C to +100 C (Industrial) | — |
| 濕度敏感等級 (MSL) | 3 | — |
| Peak Reflow Temperature | 260 C | — |
| Maximum Time at Peak Reflow | 30 s | — |
| Terminal Finish | Tin/Silver/Copper (JESD-609 e1) | — |
| Automotive Qualification | AEC-Q100 (XA flow) | — |
| Configuration Modes | Master SPI, Master BPI, Slave SelectMAP, Slave Serial, JTAG | — |
| Device Type | — | Artix-7 FPGA |
| Configuration Memory | — | 737,280 bits |
| Performance Grade | — | -2 |
| Process Technology | — | 28 nm HKMG HPL |
| Package Type | — | CSPBGA |
| 安裝類型 | — | Surface Mount |
| Programmable Logic Type | — | FPGA |
| Product Family | — | Artix-7 |
| Number of Logic Cells | — | 12,800 cells |
| Number of User I/Os | — | 150 I/Os |
| Silicon Technology | — | 28 nm HKMG HPL process |
| RoHS 狀態 | — | Compliant |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |
| Supply Voltage Range | — | [DATA_NEEDED: core and I/O supply voltage ranges] |
| Block RAM Capacity | — | [DATA_NEEDED: block RAM capacity] |
| DSP Slice Count | — | [DATA_NEEDED: DSP slice count] |
| 最大時脈頻率 | — | [DATA_NEEDED: maximum clock frequency] |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |