XC6SLX75T-2CSG484C vs XC6SLX45-2CSG484C 比較
詳細並排比較 XC6SLX75T-2CSG484C 由 AMD 與 XC6SLX45-2CSG484C 由 AMD. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC6SLX75T-2CSG484C | XC6SLX45-2CSG484C |
|---|---|---|
| 品牌 | AMD | AMD |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Family | Spartan-6 LXT | Spartan-6 LX |
| Logic Cells | 74,637 | — |
| Logic Array Blocks (LABs) | 5,831 | — |
| Adaptive Logic Modules (ALMs) | 11,662 | — |
| Total RAM Bits | 3,170,304 | — |
| User I/O Pins | 292 | — |
| Core Supply Voltage | 1.2 V (1.14 V to 1.26 V) | — |
| Process Technology | 45 nm CMOS | 45 nm CMOS, 9-metal copper low-k |
| 封裝 | 484-CSBGA (19x19 mm) | 484-ball CSBGA (CSPBGA, 19 x 19 mm, 0.8 mm pitch) |
| 工作溫度 | 0C to +85C | — |
| Speed Grade | -2 | -2 |
| RoHS 狀態 | Compliant | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA, requires microvia PCB) |
| Number of I/O Banks | [DATA_NEEDED: Number of I/O Banks] | — |
| DSP Slices | [DATA_NEEDED: DSP Slices] | — |
| Clock Management Tiles | [DATA_NEEDED: Clock Management Tiles] | — |
| Device Logic Cells | — | 43,661 |
| CLBs / LABs | — | 3,411 |
| Slices | — | 6,822 |
| Distributed RAM (Kb) | — | [DATA_NEEDED: distributed RAM Kb] |
| Block RAM (bits) | — | 2,138,112 (~261 Kib) |
| DSP48A1 Slices | — | 58 |
| User I/O Count | — | 320 |
| Maximum User I/O (per datasheet) | — | [DATA_NEEDED: max user I/O value] |
| Operating Temperature (Commercial) | — | 0 C to +85 C |
| Core Supply Voltage (VCCINT) | — | 1.2 V (range 1.14 V to 1.26 V) |
| Auxiliary Supply Voltage (VCCAUX) | — | 3.3 V |
| IO Supply Voltage (VCCO) | — | 1.2 V to 3.3 V (per bank) |
| Internal Frequency (max) | — | 500 MHz |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |
| RoHS / Lead-free | — | Compliant / Pb-free (lead-free) |
| Configuration Modes | — | JTAG, Slave Serial, SPI, BPI |
| Transceivers | — | None (LX variant; LXT variant required for GTP) |