XC6SLX9-2TQG144I vs XC6SLX9-3TQG144I 比較
詳細並排比較 XC6SLX9-2TQG144I 由 AMD 與 XC6SLX9-3TQG144I 由 AMD. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | XC6SLX9-2TQG144I | XC6SLX9-3TQG144I |
|---|---|---|
| 品牌 | AMD | AMD |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Spartan-6 LX | — |
| Logic Cells | 9,152 | 9,152 logic cells |
| Slices / ALMs | 1,430 ALMs (715 CLBs) | — |
| Block RAM | 576 Kbits (72 x 18 Kb) | [DATA_NEEDED: block RAM quantity] |
| DSP Slices | 16 (DSP48A1) | [DATA_NEEDED: DSP slice quantity] |
| Maximum User I/O | 102 | — |
| 封裝 | 144-pin TQFP (TQG144), 20 x 20 mm, 0.5 mm pitch | 144-LQFP |
| Speed Grade | -2 (mid-range) | -3 |
| 工作溫度 | -40C to +100C (Industrial) | 0 C to 85 C (32 F to 185 F) |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Voltage (VCCO) | 1.2 V to 3.3 V | — |
| Process Technology | 45 nm low-power CMOS (9-metal copper) | — |
| Memory Interfaces | DDR, DDR2, DDR3, LPDDR (via Memory Controller Block) | — |
| Clock Management | DCM + PLL per tile | — |
| 安裝類型 | Surface Mount | Surface mount |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| RoHS 狀態 | RoHS Compliant (Lead Free) | unknown |
| Device Type | — | FPGA |
| FPGA Family | — | Spartan-6 LX |
| I/O Count | — | 102 I/O |
| 腳位數 | — | 144 pins |
| Variant Suffix | — | I |
| Temperature Grade | — | Industrial temperature variant indicated by I suffix; exact temperature range not provided |
| Internal Frequency | — | 667 MHz |
| 供應電壓 | — | [DATA_NEEDED: supply voltage] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory type] |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | not_applicable |