AD673JN - 8-Bit SAR ADC with Reference | Analog Devices
MPN： AD673JN ✓ 啟用中AD673JN 概覽
An ADC converts a continuously varying analog voltage into a digital value for processing, measurement, or control. The AD673 belongs to the successive-approximation ADC category, within the broader hierarchy of data-converter ICs and signal-processing semiconductors. Rather than requiring a separate reference, comparator, clock, and internal DAC, the AD673 combines these functions on one monolithic chip, simplifying instrumentation and industrial data-acquisition designs.
Key features include 8-bit resolution, a maximum conversion time of 30 microseconds, unipolar and bipolar input capability, and no missing codes over the specified temperature range. The converter operates from +5 V and -15 V supplies, while its integrated voltage reference, internal clock, and three-state output buffers reduce external component count. These characteristics suit process monitoring, digital instrumentation, industrial control, and embedded measurement systems requiring deterministic acquisition timing.
The internal successive-approximation function uses integrated injection logic, and the internal DAC uses a laser-trimmed, high-stability silicon-chromium thin-film resistor ladder. A temperature-compensated subsurface Zener reference supports stable conversion performance. Full-byte or 16-bit microprocessor bus interface options allow the converter to operate with processors using either byte-oriented or wider parallel data arrangements.
Typical applications include industrial process measurement, laboratory data-acquisition systems, digital panel meters, embedded control platforms, and legacy computer interface cards. In each case, the integrated converter functions simplify the analog front end while the 30 microsecond maximum conversion time provides a defined upper bound for sampling cycles.
When designing the circuit, preserve the negative supply arrangement required by the converter and use the manufacturer pin-description table when assigning data-bus and control signals. Verify input range, output coding, timing, and acquisition-system settling requirements against the Analog Devices AD673 datasheet before fixing the analog front-end and bus timing.
This product overview combines the converter architecture, interface considerations, drop-in family options, and practical selection guidance into an engineering-focused reference for designers evaluating the AD673JN for new or legacy data-acquisition equipment.
直接替換替代品，適用於 AD673JN — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： AD673JN （相同外形與佔位） — 差異在於 Package.
AD673JNZ
✅ 直接替換📋 參考替代品（不在目錄中）
AD673JD
✅ 直接替換聯絡詢價
查看資料表 →AD673SD/883B
✅ 直接替換📋 參考替代品（不在目錄中）
AD673J
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
AD673JN 最大額定值與電氣特性
| Converter Type | 8-bit successive-approximation ADC |
| 解析度 | 8 bit |
| Maximum Conversion Time | 30 us |
| Input Type | Unipolar and bipolar |
| Missing Codes | No missing codes over temperature |
| Positive Supply Voltage | +5 V |
| Negative Supply Voltage | -12 V or -15 V |
| Microprocessor Interface | Full-byte or 16-bit parallel bus |
| Integrated Functions | DAC, voltage reference, clock, comparator, SAR, and three-state output buffers |
| DAC Implementation | Laser-trimmed SiCr thin-film resistor ladder |
| Reference Implementation | Temperature-compensated subsurface Zener reference |
| Logic Implementation | Integrated injection logic (I2L) |
| 封裝 | 20-pin plastic DIP |
| 工作溫度範圍 | 0C to +70C |
| Military Version | AD673/883B version available |
AD673JN 20-pin plastic dip 腳位配置指南
AD673JN（20-pin plastic dip 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： AD673JN.
請參閱 資料表 以查看完整腳位配置。
典型應用
AD673JN 適用於 6 應用s: Industrial Process Measurement, Digital Panel Meter, Laboratory Data Acquisition, Embedded Control Platform, Legacy Computer Interface Card, Digital Control and Monitoring.
Industrial Process Measurement
The AD673JN is appropriate for industrial process-monitoring systems that digitize pressure, temperature, level, or flow signals into an 8-bit value for display or control. Its unipolar and bipolar input support allows the same converter architecture to serve different sensor-conditioning signals, while the maximum 30-microsecond conversion time defines the acquisition interval. The integrated reference, clock, DAC, comparator, and SAR reduce the number of external analog functions required around the converter. Designers should use the manufacturer pin-description table to connect the selected input mode, control lines, and tri-state output bus, then confirm that the 0C to +70C grade suits the equipment enclosure and operating environment.
推薦
Digital Panel Meter
The AD673JN can serve as the measurement engine in a digital panel meter that converts an analog sensor signal and presents the result through a microprocessor-controlled display. Its complete 8-bit conversion architecture eliminates the need for a separate internal DAC, reference, clock, comparator, and SAR, reducing board complexity. A maximum conversion time of 30 microseconds allows the controller to schedule repeated measurements, while unipolar and bipolar inputs support both common positive signals and bipolar conditioned sensor outputs. The design should include suitable input conditioning, supply bypassing, and bus timing that prevents output contention whenever the converter's three-state outputs are enabled.
推薦
Laboratory Data Acquisition
The AD673JN fits laboratory instruments that acquire slowly changing analog signals and require a deterministic parallel digital interface. Its 8-bit resolution is appropriate for coarse measurements, and the stated maximum conversion time of 30 microseconds supports sequential acquisition of multiple channels when multiplexing is placed outside the converter. The full-byte or 16-bit microprocessor bus interface provides flexibility for legacy instrument architectures, while the integrated clock and voltage reference reduce external support circuitry. For reliable measurements, the analog input must remain within the selected unipolar or bipolar range, and the instrument should account for input settling before each conversion and output-bus turnaround afterward.
推薦
Embedded Control Platform
The AD673JN can provide a compact measurement input for an embedded controller that must convert an analog process or sensor signal into an 8-bit digital value. The converter's integrated reference, clock, DAC, comparator, SAR, and output buffers make it useful when a legacy controller board has a parallel data port but limited analog support circuitry. Its maximum 30-microsecond conversion time supports deterministic polling, and unipolar or bipolar operation broadens the range of signal-conditioning outputs that can be connected. The controller must correctly control read and chip-select timing, place the converter in a defined state between accesses, and preserve the required +5 V and -15 V supply arrangement.
推薦
Legacy Computer Interface Card
The AD673JN is suited to restoring or maintaining a legacy computer interface card that expects an 8-bit parallel ADC with tri-state data outputs. The converter supports full-byte or 16-bit microprocessor bus operation, allowing it to participate in systems organized around byte-wide or wider parallel buses. Its integrated reference, clock, and internal conversion functions simplify repair boards compared with a design using separate converter components. Because the AD673JN uses a 20-pin plastic DIP, the card layout must provide adequate clearance for the package and interconnection leads. Signal conditioning, input-range selection, and bus contention control remain critical engineering tasks in this legacy platform.
推薦
Digital Control and Monitoring
The AD673JN can convert conditioned analog feedback into digital information for a digital control or monitoring system. Its 8-bit resolution may be sufficient for coarse supervisory loops, alarm thresholds, and machine-state monitoring, while the 30-microsecond maximum conversion time provides a predictable upper limit for periodic sampling. Supporting unipolar and bipolar inputs enables the converter to work with different sensor-front-end outputs without changing the converter's resolution. For reliable control behavior, engineers should establish an input-settling interval, synchronize read commands with conversion completion, and include supply bypassing close to the converter. The operating-temperature grade must also be checked against the machine's internal temperature range.
推薦
推薦產品摘要
工程參考資料，適用於 AD673JN — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | AD673JNZ | AD673JD | AD673SD/883B |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 20-pin plastic DIP | 20-pin plastic DIP | 20-pin DIP | 20-pin DIP |
| Converter Type | 8-bit successive-approximation ADC | 8-bit AD673-family ADC | 8-bit AD673-family ADC | 8-bit AD673-family ADC |
主要差異化特點
- Complete monolithic converter integration (對比AD673JNZ)
- Defined acquisition performance (對比AD673JD)
- Parallel processor interface flexibility (對比AD673SD/883B)
- Commercial-temperature plastic DIP construction (對比AD673SD/883B)
設計說明
Place the AD673JN close to the analog input network and the controller that owns the parallel bus. Route the analog input away from digital clock and bus traces, use a compact ground-return path, and place input and bypass capacitors near the associated pins. The converter's tri-state outputs should connect only to the intended data bus, with pull-up or pull-down resistors added where a defined disabled state is required by the system interface.
Provide stable +5 V and -15 V rails and decouple both supplies near the device. The +5 V and -12 V or -15 V arrangement is integral to the converter's operation, so do not substitute a single positive rail without re-evaluating the circuit. Confirm startup sequencing, supply tolerances, and the voltage at every power pin against the Analog Devices AD673 datasheet. High-impedance analog input nodes can require additional guarding or shielding to reduce leakage and interference.
Do not treat the 30-microsecond maximum conversion time as the complete system acquisition time. Include input settling, conversion-start delay, chip-select and read-control timing, output access, and bus turnaround around each sample. Avoid changing the multiplexed output state while another bus device drives the same lines. For bipolar measurements, confirm the selected input configuration and sign convention against the pin-description and transfer-characteristic sections of the manufacturer datasheet.
Keep the analog source impedance compatible with the converter's sampling network and provide enough settling time between switching the input and starting conversion. Place the return path for the analog input beside the signal trace where practical, and keep switching-regulator and clock-node return currents from crossing the input reference area. If the source has high impedance, add a suitable buffer or lower-impedance termination rather than relying on extra software averaging to correct an improperly settled conversion.
合規資訊
The AD673/883B family has a MIL-STD-883 option, but no AEC-Q100 qualification statement was identified for AD673JN. RoHS, REACH, lead-free, halogen-free, and conflict-minerals status require confirmation from the manufacturer or current product documentation.
