LTC2173IUKG-14 - 14-Bit 80Msps Quad ADC | Analog Devices
MPN： LTC2173IUKG-14 ✓ 啟用中LTC2173IUKG-14 概覽
An ADC (analog-to-digital converter) is a semiconductor device that converts continuous analog signals into discrete digital codes. Quad ADCs integrate four converter channels on a single die, enabling simultaneous sampling of multiple signals - critical for multi-channel communication, phased-array radar, and medical imaging systems. The LTC2173IUKG-14 belongs to the pipelined ADC architecture family, where each conversion stage processes a few bits and passes the residue to the next stage; this allows high sample rates with low power per channel. Within the broader product taxonomy, this part falls under ADC -> data converter -> signal chain IC -> semiconductor.
Key specifications include 14-bit resolution, 80 Msps sample rate per channel, 73.1 dB SNR (typical at 14 MHz input), 90 dB SFDR, and 1.4 GHz analog input bandwidth. The device operates from a single 1.8 V supply, supports LVDS/LVCMOS output formats, and offers a serial SPI port for mode programming. It also integrates an internal bandgap reference and provides per-channel offset calibration.
The pipeline architecture delivers 80 Msps sample rates with only 4 clock cycles of latency, making the LTC2173IUKG-14 well-suited for real-time signal processing. Its low power consumption allows dense multi-channel layouts without complex thermal management. The 52-pin QFN package exposes the thermal die pad for direct PCB heat dissipation, simplifying board design in space-constrained applications.
Typical applications include multi-carrier wireless base station receivers, portable ultrasound imaging front-ends, industrial data acquisition systems, and software-defined radio (SDR) platforms. Engineers value this part for its ability to capture four synchronized analog signals in a small footprint while maintaining excellent dynamic range.
When designing with this ADC, allocate at least 4 layers for the PCB with a continuous ground plane under the QFN thermal pad. Use 0.1 uF and 10 uF decoupling capacitors close to each supply pin, and route LVDS output pairs with 100 ohm differential impedance and length matching within 5 mm to preserve SNR.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical layout notes not found in the manufacturer datasheet.
直接替換替代品，適用於 LTC2173IUKG-14 — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： LTC2173IUKG-14 （相同外形與佔位） — 差異在於 Package, Resolution, Number of Channels, Digital Output Interface, Input Type.
LTC2173CUKG-14
✅ 直接替換📋 參考替代品（不在目錄中）
LTC2174IUKG-14
✅ 直接替換聯絡詢價
查看資料表 →LTC2175IUKG-14
✅ 直接替換📋 參考替代品（不在目錄中）
LTC2172IUKG-12
✅ 直接替換聯絡詢價
查看資料表 →LTC2171IUKG-12
✅ 直接替換聯絡詢價
查看資料表 →LTC2171CUKG-14
✅ 直接替換聯絡詢價
查看資料表 →LTC2173IUKG-14 最大額定值與電氣特性
| 解析度 | 14 bit |
| Number of Channels | 4 (simultaneous sampling) |
| Sample Rate per Channel | 80 Msps |
| Architecture | Pipelined |
| Input Type | Differential (single-ended optional) |
| Analog Input Bandwidth | 1.4 GHz |
| SNR (typical) | 73.1 dB at 14 MHz input |
| SFDR | 90 dB |
| Power Dissipation per Channel | 120 mW at 80 Msps |
| 供應電壓 | 1.8 V (single) |
| Digital Output Interface | LVDS (serial) |
| 工作溫度範圍 | -40C to +85C (industrial grade) |
| 封裝 | 52-pin QFN (UKG) 7x8 mm with exposed pad |
| 安裝類型 | Surface Mount |
| MSL 等級 | 3 (168 hours) |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
LTC2173IUKG-14 腳位配置
| 腳位 1 | INA+ — Channel A positive analog input |
| 腳位 2 | INA- — Channel A negative analog input |
| 腳位 3 | INB+ — Channel B positive analog input |
| 腳位 4 | INB- — Channel B negative analog input |
| 腳位 5 | INC+ — Channel C positive analog input |
| 腳位 6 | INC- — Channel C negative analog input |
| 腳位 7 | IND+ — Channel D positive analog input |
| 腳位 8 | IND- — Channel D negative analog input |
| 腳位 9 | VCM — Common mode voltage output |
| 腳位 10 | GND — Ground |
| 腳位 11 | CLK+ — Clock positive input |
| 腳位 12 | CLK- — Clock negative input |
| 腳位 13 | GND — Ground |
| 腳位 14 | OE — Output enable (active high) |
| 腳位 15 | GND — Ground |
| 腳位 16 | SDI — Serial data input (SPI) |
| 腳位 17 | SDO — Serial data output (SPI) |
| 腳位 18 | SCK — Serial clock input (SPI) |
| 腳位 19 | CS — Chip select (active low) |
| 腳位 20 | GND — Ground |
| 腳位 21 | OUTA+ — Channel A LVDS positive output |
| 腳位 22 | OUTA- — Channel A LVDS negative output |
| 腳位 23 | OUTB+ — Channel B LVDS positive output |
| 腳位 24 | OUTB- — Channel B LVDS negative output |
| 腳位 25 | OUTC+ — Channel C LVDS positive output |
| 腳位 26 | OUTC- — Channel C LVDS negative output |
| 腳位 27 | OUTD+ — Channel D LVDS positive output |
| 腳位 28 | OUTD- — Channel D LVDS negative output |
| 腳位 29 | GND — Ground |
| 腳位 30 | VDD — 1.8V digital supply |
| 腳位 31 | VDD — 1.8V digital supply |
| 腳位 32 | GND — Ground |
| 腳位 33 | OVDD — 1.8V output driver supply |
| 腳位 34 | FR+ — Frame output positive |
| 腳位 35 | FR- — Frame output negative |
| 腳位 36 | CLKOUT+ — Clock output positive |
| 腳位 37 | CLKOUT- — Clock output negative |
| 腳位 38 | GND — Ground |
| 腳位 39 | VDD — 1.8V digital supply |
| 腳位 40 | SENSE — Voltage reference sense pin |
| 腳位 41 | VREF — Voltage reference bypass |
| 腳位 42 | GND — Ground |
| 腳位 43 | VCMBYP — Common mode bypass |
| 腳位 44 | GND — Ground |
| 腳位 45 | NC — Not connected |
| 腳位 46 | NC — Not connected |
| 腳位 47 | NC — Not connected |
| 腳位 48 | NC — Not connected |
| 腳位 49 | MODE — Mode select |
| 腳位 50 | GND — Ground |
| 腳位 51 | VA25 — 2.5V analog supply |
| 腳位 52 | VA25 — 2.5V analog supply |
典型應用
LTC2173IUKG-14 適用於 6 應用s: Multi-Carrier Wireless Base Station Receiver, Portable Ultrasound Imaging Front-End, Industrial Multi-Channel Data Acquisition, Software Defined Radio (SDR) Platform, Phased Array Radar Signal Digitization, Automated Test Equipment (ATE) Digitizer.
Multi-Carrier Wireless Base Station Receiver
The LTC2173IUKG-14's four simultaneous-sampling 14-bit channels at 80 Msps capture multiple carrier signals in a compact footprint. Its 73.1 dB SNR and 90 dB SFDR support wide dynamic range reception needed for multi-carrier GSM/LTE systems. Placed at the IF output of each receiver chain, the ADC digitizes up to four antenna streams with deterministic latency. The 1.8 V single-supply operation simplifies the power tree, and the 52-pin QFN package with exposed pad provides efficient thermal dissipation for -40C to +85C industrial operation.
推薦
Portable Ultrasound Imaging Front-End
In portable ultrasound, the LTC2173IUKG-14's 4-channel simultaneous sampling at 80 Msps enables digital beamforming across transducer elements. The 1.4 GHz analog input bandwidth captures the full bandwidth of ultrasound transducers, while 73.1 dB SNR preserves subtle tissue contrast differences critical for diagnostic imaging. Low power consumption (~120 mW per channel) keeps thermal load manageable in handheld probes. The compact 52-pin QFN (7x8 mm) package fits densely on beamformer boards where 32-128 channels must be tightly packed.
推薦
Industrial Multi-Channel Data Acquisition
The LTC2173IUKG-14 serves as the core digitizer in industrial DAQ systems requiring synchronized sampling of up to four sensor inputs. Its 14-bit resolution and 80 Msps provide sufficient bandwidth for vibration analysis, acoustic emission monitoring, and high-speed control loop feedback. The LVDS serial output minimizes pin count on the 52-pin QFN, easing board layout in dense backplane designs. Industrial temperature grade (-40C to +85C) ensures reliable operation in factory floor environments.
推薦
Software Defined Radio (SDR) Platform
For SDR applications, the LTC2173IUKG-14's four channels enable multi-band capture with a single IC. The 80 Msps sample rate and 1.4 GHz analog input bandwidth support direct sampling of IF signals up to ~200 MHz. The pipelined architecture with deterministic latency simplifies timing alignment in DSP processing. The 1.8 V supply and low power per channel make it suitable for portable SDR platforms and tactical radio systems.
推薦
Phased Array Radar Signal Digitization
In phased array radar systems, the LTC2173IUKG-14 captures multiple receive channels simultaneously, preserving the phase relationships required for beam steering. Its 80 Msps sample rate supports IF digitization of typical X-band radar signals, while 73.1 dB SNR preserves signal-to-noise for target detection. The synchronized four-channel architecture eliminates timing skew across antenna elements - a critical requirement for coherent beamforming.
推薦
Automated Test Equipment (ATE) Digitizer
The LTC2173IUKG-14 is ideal for ATE digitizer cards requiring four simultaneous channels at high sample rate. Its 14-bit resolution and 73.1 dB SNR enable accurate waveform capture for production test of mixed-signal ICs, RF modules, and high-speed serial links. The deterministic pipeline latency (4 clock cycles) simplifies timing calibration in test fixtures. The compact 52-pin QFN allows dense channel count on PXI/cPCI digitizer modules.
推薦
推薦產品摘要
工程參考資料，適用於 LTC2173IUKG-14 — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | LTC2173CUKG-14 | LTC2174IUKG-14 | LTC2175IUKG-14 | LTC2172IUKG-12 | LTC2171IUKG-12 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 52-pin QFN (UKG) 7x8 mm | 52-pin QFN (UKG) 7x8 mm - same | 52-pin QFN (UKG) 7x8 mm - same | 52-pin QFN (UKG) 7x8 mm - same | 52-pin QFN (UKG) 7x8 mm - same | 52-pin QFN (UKG) 7x8 mm - same |
| Resolution | 14 bit | 14 bit | 14 bit | 14 bit | 12 bit | 12 bit |
| Sample Rate | 80 Msps | 80 Msps | 105 Msps | 125 Msps | 80 Msps | 65 Msps |
| Number of Channels | 4 | 4 | 4 | 4 | 4 | 4 |
| Temperature Grade | Industrial -40C to +85C | Commercial 0C to +70C | Industrial -40C to +85C | Industrial -40C to +85C | Industrial -40C to +85C | Industrial -40C to +85C |
主要差異化特點
- Lowest power consumption in 14-bit 80 Msps quad ADC class (對比LTC2175IUKG-14)
- Four simultaneous-sampling channels in compact 52-pin QFN (對比LTC2172IUKG-12)
- Industrial temperature grade in same package (對比LTC2173CUKG-14)
- Migration path to higher sample rates within same footprint (對比LTC2174IUKG-14 / LTC2175IUKG-14)
設計說明
The 52-pin QFN (UKG) exposed thermal pad must be soldered to a continuous ground plane for proper thermal and electrical performance. Recommended PCB stackup: minimum 4 layers with dedicated ground layer directly beneath the ADC. Use an array of thermal vias (0.3 mm drill, 0.5 mm pitch, 9x9 array minimum) under the exposed pad to conduct heat to inner ground planes.
Place 0.1 uF and 10 uF X7R ceramic decoupling capacitors within 2 mm of each VDD and VA25 supply pin. The clock input (CLK+/CLK-) requires a low-jitter, low-phase-noise source; the LTC2175/SN65LVDSx jitter sensitivity is approximately 0.5 ps RMS. Use a dedicated low-noise LDO (such as ADP1741) for the VA25 supply to avoid coupling digital switching noise into the analog front end.
Route analog inputs (INA+/INA-) as 100 ohm differential microstrip with length matching within 2 mm between pairs. Keep analog input traces away from digital outputs and clock signals; use a guard ground trace between them. LVDS output pairs should be 100 ohm differential with length matching within 5 mm to preserve timing margins and minimize jitter.
Do not leave the MODE pin floating - tie it to GND for one set of operating modes or to VDD for the alternate mode. Ensure CS (chip select) returns high between SPI transactions to prevent register corruption. The SENSE pin voltage sets the internal reference; tying SENSE to VDD selects the internal reference while tying to GND selects external reference mode.
Estimated: At 80 Msps with 14-bit resolution, total aperture jitter budget is approximately 0.5 ps RMS for SNR to remain above 72 dB. Use a clock source with <300 fs RMS jitter. For clock distribution, the AD9516/AD9517 from Analog Devices provides adequate jitter performance. Buffer the clock at the ADC input with a high-speed differential receiver if the clock trace exceeds 25 mm.
合規資訊
RoHS and REACH compliant per Analog Devices product page. Not AEC-Q100 qualified - this is a commercial/industrial grade ADC; contact Analog Devices for automotive grade options.
