MAX120CAG+ - 12-Bit 500ksps SAR ADC | Maxim Integrated
MPN： MAX120CAG+ ✓ 啟用中MAX120CAG+ 概覽
An ADC is an analog-to-digital converter, a data-conversion IC that transforms a continuously varying voltage into a numeric code for processing by a microcontroller, DSP, FPGA, or other digital controller. The MAX120 belongs to the broader data-converter IC hierarchy, where it provides the bridge between a sensor or conditioning circuit and digital computation. Its parallel output architecture is intended for systems that can directly read a 12-bit conversion result.
The MAX120CAG+ supports sampling rates as high as 500 ksps, while its 350 ns track-and-hold acquisition time allows the input to settle before conversion. Its 1.6 µs conversion time and integrated low-drift reference reduce the external circuitry required for a complete measurement channel. The BiCMOS construction combines bipolar and CMOS circuit technologies, supporting a device that combines reference, sampling, and conversion functions.
The converter provides 12-bit resolution and one analog input. The MAX120 family datasheet identifies the MAX120 and MAX122 as complete BiCMOS sampling ADCs with track-and-hold and reference functions. This integration makes the MAX120CAG+ useful where a deterministic parallel interface and rapid sampling are more important than the very low power consumption associated with compact serial-interface converters.
Typical uses include industrial process monitoring, instrumentation, digital voltmeters, data acquisition, control loops, and signal measurement systems. Its 500 ksps throughput supports sampling of rapidly changing analog waveforms, while the integrated reference can simplify system architecture. The parallel interface can also reduce the number of serial transactions required when the destination processor provides suitable input latches or an external bus interface.
When laying out a board, place the analog input and reference connections away from switching nodes and high-current traces. Provide a stable analog ground path, follow the datasheet bypass recommendations, and account for input bandwidth and source settling time. The acquisition period is only 350 ns, so an input driver with excessive output impedance can degrade accuracy during successive conversions.
This page combines the manufacturer family specifications with package details, practical application guidance, comparison information, and qualified drop-in alternatives. These engineering-oriented details help designers evaluate acquisition timing, interface requirements, board layout, and replacement decisions without relying only on a basic catalog description.
直接替換替代品，適用於 MAX120CAG+ — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： MAX120CAG+ （相同外形與佔位） — 差異在於 Package, Resolution.
MAX120EAG+
✅ 直接替換聯絡詢價
查看資料表 →MAX120EAG/883
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
MAX120EAG/EEE
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
MAX120CAG/883
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
MAX120CAG/EEE
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
MAX120CAG+ 最大額定值與電氣特性
| ADC Type | Single-input successive-approximation ADC |
| 解析度 | 12 bits |
| Maximum Sampling Rate | 500 ksps |
| Number of Analog Inputs | 1 input |
| Track-and-Hold Acquisition Time | 350 ns |
| Conversion Time | 1.6 µs |
| Throughput Rate | 500 ksps |
| Integrated Reference | Low-drift on-chip voltage reference |
| Integrated Track-and-Hold | Yes |
| Process Technology | BiCMOS |
| Output Interface | 12-bit parallel |
| 封裝 | 24-pin SSOP, 5.30 mm width |
| 安裝類型 | Surface mount |
MAX120CAG+ 24-pin ssop, 5.30 mm width 腳位配置指南
MAX120CAG+（24-pin ssop, 5.30 mm width 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： MAX120CAG+.
請參閱 資料表 以查看完整腳位配置。
典型應用
MAX120CAG+ 適用於 6 應用s: Industrial Process Monitoring, Digital Voltmeter and Instrumentation, Rapid Waveform Data Acquisition, Automated Control Systems, Digital Power and Load Monitoring, Audio and Communication Signal Sampling.
Industrial Process Monitoring
The MAX120CAG+ fits industrial process monitoring because it combines 12-bit resolution with a 500 ksps sampling rate and a 350 ns track-and-hold acquisition time. It can digitize a conditioned pressure, temperature, or position signal while the integrated low-drift reference reduces the number of analog components in the measurement channel. Its 1.6 µs conversion time supports rapid updates, although the parallel output requires enough input pins on the controller or an interface adapter. A robust implementation should isolate the field input, protect the analog pin against transients, and keep switching converters away from the measurement front end.
推薦
Digital Voltmeter and Instrumentation
The MAX120CAG+ is appropriate for digital voltmeter and laboratory-instrumentation front ends that require deterministic acquisition and parallel results. A 12-bit converter can represent 4096 codes, while the 500 ksps maximum rate permits the measurement engine to average samples and improve effective noise performance when the source impedance permits. The integrated reference and track-and-hold circuit simplify the analog section. Designers should still include input protection, calibration, and a stable ground arrangement, particularly when the measured signal comes from long cables or a floating source.
推薦
Rapid Waveform Data Acquisition
The MAX120CAG+ can serve as the front end of a rapid waveform data-acquisition system because it combines a 350 ns acquisition interval, a 1.6 µs conversion time, and a maximum throughput of 500 ksps. The 12-bit parallel bus permits a digital engine to capture each code without serial-interface overhead. This approach is useful for supervisory control, vibration monitoring, and repetitive signal sampling where a low-latency result matters. The analog driver must settle the input within the acquisition window, and the digital interface should account for setup and propagation delays when timing the parallel output.
推薦
Automated Control Systems
The MAX120CAG+ supports automated control loops that repeatedly measure an analog condition and update a digital controller. Its 500 ksps throughput provides frequent feedback samples, while the 12-bit resolution supports incremental control decisions over a suitable operating range. The integrated track-and-hold and reference allow the converter to occupy a compact section of an analog control board. A practical design should preserve adequate loop bandwidth, isolate the input from high-energy switching paths, and avoid placing fast digital edges beneath the analog signal and reference connections.
推薦
Digital Power and Load Monitoring
The MAX120CAG+ can monitor voltage, current, and temperature signals in a digital power system where rapid sampling improves control-loop or protection response. Its 500 ksps rate allows the controller to observe changes much faster than a slow instrumentation ADC, and the 12-bit output provides a practical balance between resolution and parallel wiring. Input conditioning remains essential: divider impedance must satisfy the 350 ns acquisition requirement, and the analog and digital return currents should be planned to prevent measurement error during switching transitions.
推薦
Audio and Communication Signal Sampling
The MAX120CAG+ is suitable for communication-signal monitoring when a compact parallel ADC is preferred over a serial-interface converter. Its 12-bit resolution and 500 ksps throughput can capture amplitude or envelope information from a conditioned IF or baseband signal. The 350 ns acquisition time makes source settling a central design requirement, so the preceding amplifier should provide low output impedance and suitable drive capacitance. Keep the analog trace short, maintain a continuous reference ground, and separate switching-node copper to reduce conversion disturbance in the measured waveform.
推薦
推薦產品摘要
工程參考資料，適用於 MAX120CAG+ — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | MAX120EAG+ | MAX120EAG/883 | MAX120EAG/EEE | MAX120CAG/883 | MAX120CAG/EEE |
|---|---|---|---|---|---|---|
| Package | 24-pin SSOP | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same |
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Sampling Rate | 500 ksps | 500 ksps | 500 ksps | 500 ksps | 500 ksps | 500 ksps |
| Number of Analog Inputs | 1 input | 1 input | 1 input | 1 input | 1 input | 1 input |
| Acquisition Time | 350 ns | 350 ns | 350 ns | 350 ns | 350 ns | 350 ns |
| Conversion Time | 1.6 µs | 1.6 µs | 1.6 µs | 1.6 µs | 1.6 µs | 1.6 µs |
| Output Interface | 12-bit parallel | 12-bit parallel | 12-bit parallel | 12-bit parallel | 12-bit parallel | 12-bit parallel |
| Integrated Reference | Low-drift on-chip reference | Low-drift on-chip reference | Low-drift on-chip reference | Low-drift on-chip reference | Low-drift on-chip reference | Low-drift on-chip reference |
| Process Technology | BiCMOS | BiCMOS | BiCMOS | BiCMOS | BiCMOS | BiCMOS |
主要差異化特點
- Matches the MAX120EAG+ core conversion performance while retaining the same PCB footprint (對比MAX120EAG+)
- Combines sampling and reference functions in one converter (對比AD9066AR)
- Provides a simpler parallel acquisition interface than conventional serial-output converters (對比MCP3424-E/SL)
設計說明
Design the analog input network to settle within the MAX120CAG+'s 350 ns acquisition interval. Account for the output impedance and capacitance of the preceding amplifier, the ADC input capacitance, and the source impedance of a sensor divider. A practical design should calculate worst-case settling at the selected 500 ksps rate and verify accuracy with the fastest input transitions rather than relying only on a nominal sample-clock period.
Route the analog input directly to the converter and keep it away from switching-node copper, high-current inductors, and fast digital clock traces. Use a continuous ground plane, place bypass capacitors close to the supply and ground pins, and avoid splitting the ground path beneath the converter. The integrated reference and track-and-hold circuits reduce external parts, but their performance still depends on clean supply return paths and controlled board-level noise.
Do not treat the 12-bit parallel outputs as independent outputs that can be sampled at an arbitrary instant. Read them as one coherent conversion result using the acquisition and conversion timing in the manufacturer datasheet. Also verify the output logic levels, data setup requirements, and bus timing of the destination FPGA, DSP, or microcontroller. A timing error at the digital interface can invalidate an otherwise accurate analog conversion.
Provide a stable, low-noise supply to the converter and follow the manufacturer bypass recommendations. Since the reference is integrated, supply noise and ground movement can still modulate the measured result. Test the system with the analog front end, digital controller, and switching elements operating together, because a converter that performs well on an isolated bench may show different results in a complete mixed-signal assembly.
合規資訊
No explicit compliance declarations are stated in the manufacturer family material provided for this page. The MAX120CAG+ is an analog-to-digital converter and is not identified as an AEC-Q100-qualified automotive part.
