PCF8575CDW - 16-Bit I2C I/O Expander | Texas Instruments
MPN： PCF8575CDW ✓ 啟用中PCF8575CDW 概覽
An I/O expander is an interface IC that increases the number of digital input/output lines available to a microcontroller, embedded processor, or other bus controller. Its hierarchy is I/O expander → bus interface expander → digital interface IC → semiconductor. Unlike a dedicated GPIO controller, the PCF8575 family uses a compact I2C/SMBus register interface and quasi-bidirectional ports that can operate as inputs or outputs without separate direction registers.
The principal features are 16 independently usable I/O pins, a 2.5 V to 5.5 V supply range, interrupt support, and 400 kHz operation. Each port has latched output capability with high-current drive suitable for directly driving LEDs. At power-on, the I/O pins enter a high state. The interrupt output provides a hardware indication that an input or selected port event requires host attention, reducing unnecessary serial polling.
The PCF8575CDW uses a serial protocol compatible with I2C and SMBus systems. Three address-selection pins allow multiple expanders to coexist on the same bus by assigning different device addresses. The 16 quasi-bidirectional lines are organized as P00 through P07 and P10 through P15. Their architecture makes the device practical for translating a compact microcontroller footprint into a larger control interface without adding individual GPIO packages.
Typical applications include LED status and signage control, keypad or button matrix interfaces, relay and solenoid control, industrial automation modules, digital sensor gathering, and general-purpose embedded-control boards. The interrupt output is particularly useful when numerous remote inputs must be monitored across multiple PCF8575 devices while keeping the host's serial traffic low.
Designers should account for the quasi-bidirectional port architecture, confirm pull-up requirements for SDA and SCL, and ensure the host bus voltage is compatible with the expander's supply. Address pins must be configured before all devices on a shared bus communicate. The 24-pin SOIC footprint also requires adequate spacing between adjacent pins for soldering and inspection.
This product page organizes the PCF8575CDW's principal electrical characteristics, pin assignments, interface considerations, same-package replacement candidates, and practical design guidance. It also distinguishes the ordering suffix from functional differences, helping engineers evaluate PCB reuse without relying only on a basic distributor description.
直接替換替代品，適用於 PCF8575CDW — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
PCF8575CDWRE4
✅ 直接替換📋 參考替代品（不在目錄中）
PCF8575CDWE4
✅ 直接替換📋 參考替代品（不在目錄中）
PCF8575CDW 規格
| Product Type | 16-bit I2C/SMBus I/O expander with interrupt output |
| Number of I/O Pins | 16 |
| Operating Supply Voltage Range | 2.5 V to 5.5 V |
| I2C/SMBus Bus Frequency | 400 kHz |
| 介面 | I2C/SMBus |
| Port Architecture | Quasi-bidirectional input/output |
| Port Groups | P00-P07 and P10-P15 |
| Interrupt Output | Yes |
| Power-On Port State | High |
| LED Drive Capability | High-current latched output drive |
| Address Selection | 3 address pins |
| 封裝 | 24-pin SOIC |
| 腳位數 | 24 pins |
| 安裝類型 | Surface mount |
PCF8575CDW 腳位配置
| 腳位 1 | INT — Interrupt output |
| 腳位 2 | A2 — Address input A2 |
| 腳位 3 | A1 — Address input A1 |
| 腳位 4 | A0 — Address input A0 |
| 腳位 5 | P00 — Quasi-bidirectional I/O port 00 |
| 腳位 6 | P01 — Quasi-bidirectional I/O port 01 |
| 腳位 7 | P02 — Quasi-bidirectional I/O port 02 |
| 腳位 8 | P03 — Quasi-bidirectional I/O port 03 |
| 腳位 9 | P04 — Quasi-bidirectional I/O port 04 |
| 腳位 10 | P05 — Quasi-bidirectional I/O port 05 |
| 腳位 11 | P06 — Quasi-bidirectional I/O port 06 |
| 腳位 12 | P07 — Quasi-bidirectional I/O port 07 |
| 腳位 13 | P10 — Quasi-bidirectional I/O port 10 |
| 腳位 14 | P11 — Quasi-bidirectional I/O port 11 |
| 腳位 15 | P12 — Quasi-bidirectional I/O port 12 |
| 腳位 16 | P13 — Quasi-bidirectional I/O port 13 |
| 腳位 17 | P14 — Quasi-bidirectional I/O port 14 |
| 腳位 18 | P15 — Quasi-bidirectional I/O port 15 |
| 腳位 19 | SCL — Serial clock input |
| 腳位 20 | SDA — Serial bidirectional data |
| 腳位 21 | VSS — Ground |
| 腳位 22 | VDD — Positive supply voltage |
| 腳位 23 | NC — Not connected |
| 腳位 24 | NC — Not connected |
典型應用
PCF8575CDW 適用於 6 應用s: LED Status and Signage Control, Keypad and Button Matrix Interface, Industrial Relay and Solenoid Control, Digital Sensor and Alarm Input Aggregation, General-Purpose Embedded Control Boards, Communication and Network Equipment Control.
LED Status and Signage Control
The PCF8575CDW is well suited to controlling grouped LED indicators because its 16 quasi-bidirectional outputs provide latched operation and high-current drive capability. A host microcontroller can use the I2C/SMBus interface to update several display or sign banks while the interrupt output provides event-driven control. With a 2.5 V to 5.5 V operating range and 400 kHz bus speed, the expander supports both 3.3 V and 5 V embedded designs. Check the datasheet's individual-pin and aggregate current limits, use the recommended series resistance for LED protection, and account for voltage-drop effects when many indicators share one port group.
推薦
Keypad and Button Matrix Interface
The PCF8575CDW can connect external switches, keypad rows, or matrix controls to a microcontroller without allocating sixteen dedicated host GPIO pins. Its P00-P07 and P10-P15 quasi-bidirectional ports can be sequenced as inputs and outputs, while the dedicated interrupt output can notify the controller when a monitored line changes. The 400 kHz I2C/SMBus interface provides ample bandwidth for routine keypad scanning, and three address pins allow multiple control boards on one bus. Account for the quasi-bidirectional behavior when configuring pull-ups or external circuitry, and debounce mechanical contacts in firmware or with suitable hardware.
推薦
Industrial Relay and Solenoid Control
The PCF8575CDW can serve as the low-voltage control interface between an embedded controller and external relays, solenoids, or other digital actuators. Sixteen latched outputs reduce the number of host connections required to implement distributed industrial-control functions, and the interrupt line supports event-driven coordination with other system blocks. Its 2.5 V to 5.5 V range accommodates common embedded supply rails, while the 400 kHz serial interface minimizes update time. External driver transistors, flyback protection, isolation, and appropriate coil-supply circuitry remain necessary because the expander is intended for control signaling rather than direct high-energy load driving.
推薦
Digital Sensor and Alarm Input Aggregation
The PCF8575CDW is useful for gathering multiple digital sensor, switch, or alarm signals from locations that are inconvenient to connect directly to a microcontroller. The interrupt output allows the host to respond when a monitored input changes instead of repeatedly polling all 16 ports, reducing serial activity and improving responsiveness. Three address-selection pins permit multiple expanders to share SDA and SCL, making the architecture suitable for distributed alarm panels, equipment-monitoring modules, and access-control interfaces. Design the system for the appropriate signal voltage, account for input polarity in firmware, and ensure pull-up values remain valid when the total bus capacitance rises.
推薦
General-Purpose Embedded Control Boards
The PCF8575CDW helps recover I/O capacity on compact embedded-control boards where host-package pins are limited. Its two eight-port banks can support mixed input and output functions, including configuration straps, peripheral-enable signals, indicator outputs, and simple input sensing. The 24-pin SOIC package is compatible with conventional surface-mount assembly practices, and the 2.5 V to 5.5 V operating range supports common embedded systems. Because the ports are quasi-bidirectional, external circuitry should not force an input strongly beyond its supply rail, and firmware should account for the high power-on state when designing reset-sensitive external hardware.
推薦
Communication and Network Equipment Control
The PCF8575CDW can add monitoring and control lines to network-access equipment, interface modules, and industrial communication terminals. A host processor can use the 16 quasi-bidirectional ports for status LEDs, link-enable signals, fault inputs, or peripheral control while retaining its primary serial interfaces for communications. The interrupt feature allows the processor to react promptly to an external change without continuous polling, and the three address pins support multiple expander devices when distributed control points are required. Keep the 400 kHz bus timing and pull-up network within specification, and provide suitable protection or isolation when the controlled signals leave the equipment enclosure.
推薦
推薦產品摘要
工程參考資料，適用於 PCF8575CDW — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PCF8575CDWRE4 | PCF8575CDWE4 |
|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 24-pin SOIC | 24-pin SOIC | 24-pin SOIC |
| I/O Count | 16 | 16 | 16 |
| Operating Voltage | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
| Bus Frequency | 400 kHz | 400 kHz | 400 kHz |
| Interrupt Output | Yes | Yes | Yes |
| Port Architecture | Quasi-bidirectional | Quasi-bidirectional | Quasi-bidirectional |
| Address Selection Pins | 3 | 3 | 3 |
| Power-On I/O State | High | High | High |
主要差異化特點
- Matches the identified same-brand ordering variants in core functionality (對比PCF8575CDWRE4)
- Provides the same functional interface in a second same-brand ordering configuration (對比PCF8575CDWE4)
- Combines interrupt-driven status notification with a compact 24-pin SOIC footprint (對比PCF8575CDWRE4)
設計說明
Place the PCF8575CDW close to the connectors or controlled circuits that use its 16 ports, while keeping the I2C routing away from high-current switching nodes. Follow the TI manufacturer pin-description table when assigning every 24-pin SOIC net, and preserve clearances required for soldering and inspection. SDA and SCL should run as a compact bus pair with continuous ground reference, and external pull-up components should be positioned near the master or at the bus point specified by the system timing design.
Do not treat the quasi-bidirectional ports as conventional push-pull GPIOs. According to the TI manufacturer datasheet, the high state is produced by a current source to VCC, and the ports are high after power-on. External circuitry must not override a port excessively in the opposite direction. Check LED current limits, use suitable series resistors, and design reset-sensitive inputs so their inactive state is compatible with the power-on high condition.
Calculate SDA and SCL pull-up values from the actual bus voltage, clock rate, total capacitance, leakage, and number of attached devices rather than copying a single nominal resistor value. The 400 kHz maximum bus rate should be validated with the slowest peripheral, wiring, and pull-up network. If several PCF8575CDW devices share the bus, include every device's pin capacitance in the timing budget and configure A0, A1, and A2 to unique addresses before the controller begins scanning.
合規資訊
Compliance status is not stated in the cited product-page and distributor records. AEC-Q100 is marked not applicable because this is a general-purpose interface IC rather than an automotive-qualified variant.