PIC24FJ128GB606-I/PT - 16-bit 32MHz 128KB Flash USB MCU | Microchip
MPN： PIC24FJ128GB606-I/PT ✓ 啟用中PIC24FJ128GB606-I/PT 概覽
A 16-bit MCU is a microcontroller whose CPU datapath, registers, and ALU operate on 16-bit-wide data words, giving roughly twice the throughput and code density of an 8-bit core while retaining deterministic real-time behaviour. The PIC24F family sits in the PIC24 -> 16-bit MCU -> microcontroller -> embedded processor hierarchy, combining moderate DSP-style performance with the broad peripheral integration (USB, PWM, ADC, comparators) typical of modern mixed-signal embedded controllers. The 'GB' suffix denotes the USB-OTG-enabled sub-family, and the '606' member is the 64-pin variant of the 64/80/100-pin PIC24FJ128GBx06 series.
Key features include a hardware multiplier and divider, seven 16-bit timers, six PWM channels, a 12-bit A/D converter with multiple input channels, multiple UART/SPI/I2C interfaces, RTCC, and an integrated full-speed USB 2.0 OTG transceiver. The XLP architecture delivers deep sleep currents in the nanoamp range while maintaining RAM retention, and the dual-partition Flash with ECC enables robust Live Update firmware without bricking risk.
Typical applications include USB human-interface devices (HID), consumer audio accessories, USB-to-UART bridges, industrial sensor hubs with USB diagnostics, low-power battery-powered data loggers, and embedded control boards that need firmware field-update capability. Designers often pair the part with external serial EEPROM for data logging and a USB type-A or micro-B connector for host/device toggling.
When designing with this MCU, ensure the USB D+/D- traces are 90-ohm differential and length-matched, place the decoupling network as close to the VDD/VSS pins as possible, and configure the VUSB3V3 pin with the recommended 4.7 uF + 0.1 uF capacitor stack. The dual-partition Live Update feature requires the application firmware to implement the bootloader protocol documented in the family reference manual.
This page synthesises distributor pricing, drop-in package-equivalent parts, and practical design notes not found in the manufacturer datasheet.
直接替換替代品，適用於 PIC24FJ128GB606-I/PT — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： PIC24FJ128GB606-I/PT （相同外形與佔位） — 差異在於 Package, Operating Temperature, Core Architecture, ADC, I/O Pins.
PIC24FJ128GA606-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GB606-E/PT
✅ 直接替換📋 參考替代品（不在目錄中）
PIC24FJ128GA606-E/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GB410-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GA610-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GA006-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GB606-I/PT 最大額定值與電氣特性
| Core Architecture | PIC24F 16-bit RISC |
| CPU Clock Speed (max) | 32 MHz |
| Program Flash Memory | 128 KB (43K x 24) with ECC, dual partition |
| RAM | 32 KB |
| General-Purpose I/O Lines | 53 |
| Timers | 7 x 16-bit |
| PWM Channels | 6 |
| USB Interface | USB 2.0 Full-Speed OTG (integrated transceiver) |
| Operating Voltage | 3.3 V typical (2.0V-3.6V supply range typical for PIC24F) |
| 工作溫度 | -40C to +85C (Industrial, 'I' suffix) |
| 封裝 | 64-pin TQFP (PT), 10x10 mm |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
| CPU Core Family | PIC24F (XLP - eXtreme Low Power) |
| Special Features | Dual-partition Flash with Live Update, ECC, RTCC, hardware multiply/divide |
PIC24FJ128GB606-I/PT 腳位配置
| 腳位 1 | RG15 — GPIO port G bit 15 |
| 腳位 2 | VDD — Core logic supply (3.3V) |
| 腳位 3 | VDD — Core logic supply (3.3V) |
| 腳位 4 | RP0 — Remappable I/O / INT0 |
| 腳位 5 | RP1 — Remappable I/O |
| 腳位 6 | RP2 — Remappable I/O |
| 腳位 7 | RP3 — Remappable I/O |
| 腳位 8 | RP4 — Remappable I/O |
| 腳位 9 | RP5 — Remappable I/O |
| 腳位 10 | VSS — Ground |
| 腳位 11 | RP6 — Remappable I/O |
| 腳位 12 | RP7 — Remappable I/O / INT1 |
| 腳位 13 | RP8 — Remappable I/O |
| 腳位 14 | RP9 — Remappable I/O |
| 腳位 15 | RP10 — Remappable I/O |
| 腳位 16 | RP11 — Remappable I/O |
| 腳位 17 | VSS — Ground |
| 腳位 18 | OSCI — Oscillator crystal input |
| 腳位 19 | OSCO — Oscillator crystal output |
| 腳位 20 | VSS — Ground |
| 腳位 21 | RP12 — Remappable I/O |
| 腳位 22 | RP13 — Remappable I/O |
| 腳位 23 | RP14 — Remappable I/O |
| 腳位 24 | RP15 — Remappable I/O |
| 腳位 25 | VDD — Core logic supply (3.3V) |
| 腳位 26 | VBUS — USB VBUS sense (5V tolerant) |
| 腳位 27 | D+ — USB data plus (differential pair) |
| 腳位 28 | D- — USB data minus (differential pair) |
| 腳位 29 | VUSB3V3 — USB internal 3.3V regulator output |
| 腳位 30 | VSS — Ground |
| 腳位 31 | RA0 — GPIO port A bit 0 / analog input |
| 腳位 32 | RA1 — GPIO port A bit 1 / analog input |
| 腳位 33 | RA2 — GPIO port A bit 2 / analog input |
| 腳位 34 | RA3 — GPIO port A bit 3 / analog input |
| 腳位 35 | RA4 — GPIO port A bit 4 / analog input |
| 腳位 36 | RA5 — GPIO port A bit 5 / analog input |
| 腳位 37 | RA6 — GPIO port A bit 6 / analog input |
| 腳位 38 | RA7 — GPIO port A bit 7 / analog input |
| 腳位 39 | VSS — Ground |
| 腳位 40 | RB0 — GPIO port B bit 0 / analog input |
| 腳位 41 | RB1 — GPIO port B bit 1 / analog input |
| 腳位 42 | RB2 — GPIO port B bit 2 / analog input |
| 腳位 43 | RB3 — GPIO port B bit 3 / analog input |
| 腳位 44 | RB4 — GPIO port B bit 4 / analog input |
| 腳位 45 | RB5 — GPIO port B bit 5 / analog input |
| 腳位 46 | RB6 — GPIO port B bit 6 / ICSPCLK |
| 腳位 47 | RB7 — GPIO port B bit 7 / ICSPDAT |
| 腳位 48 | RC1 — GPIO port C bit 1 |
| 腳位 49 | RC2 — GPIO port C bit 2 |
| 腳位 50 | RC3 — GPIO port C bit 3 |
| 腳位 51 | RC4 — GPIO port C bit 4 |
| 腳位 52 | VDD — Core logic supply (3.3V) |
| 腳位 53 | RD0 — GPIO port D bit 0 |
| 腳位 54 | RD1 — GPIO port D bit 1 |
| 腳位 55 | RD2 — GPIO port D bit 2 |
| 腳位 56 | RD3 — GPIO port D bit 3 |
| 腳位 57 | RD4 — GPIO port D bit 4 |
| 腳位 58 | RD5 — GPIO port D bit 5 |
| 腳位 59 | RD6 — GPIO port D bit 6 |
| 腳位 60 | RD7 — GPIO port D bit 7 |
| 腳位 61 | VSS — Ground |
| 腳位 62 | RF0 — GPIO port F bit 0 |
| 腳位 63 | RF1 — GPIO port F bit 1 |
| 腳位 64 | RG13 — GPIO port G bit 13 |
典型應用
PIC24FJ128GB606-I/PT 適用於 6 應用s: USB Human-Interface Devices (HID), USB-to-UART Bridge / Virtual COM Port, Industrial Sensor Hub with USB Diagnostics, Low-Power Battery Data Logger, Consumer Audio Accessory Controller, Embedded Control Board with Field-Updatable Firmware.
USB Human-Interface Devices (HID)
The PIC24FJ128GB606-I/PT's integrated USB 2.0 full-speed OTG transceiver and 53 GPIO make it an excellent host for USB HID peripherals such as keyboards, mice, game controllers, and custom input devices. The 128 KB dual-partition Flash with Live Update enables fail-safe field-update of HID firmware without bricking the device, critical for products already deployed in the field. The 32 MHz CPU comfortably handles USB polling, HID report parsing, and debouncing at the standard 125 us USB full-speed microframe rate without dropping frames.
推薦
USB-to-UART Bridge / Virtual COM Port
With on-chip USB and three UART modules, the PIC24FJ128GB606-I/PT can implement a CDC-class USB-to-serial bridge without external PHY or driver ICs. The 32 KB RAM is sufficient to buffer full-speed USB packets at 12 Mbps while maintaining the UART FIFO, and the 16 MIPS CPU easily runs the CDC stack alongside command parsing. The dual-partition Flash allows the bridge firmware to be updated in production by the host PC via the same USB cable, avoiding the need for an external programmer.
推薦
Industrial Sensor Hub with USB Diagnostics
The PIC24FJ128GB606-I/PT's 12-bit ADC, multiple UART/SPI/I2C buses, and USB port let it aggregate sensor data from a factory-floor hub and stream live diagnostics to a host PC. The XLP deep-sleep current (nanoamp range) lets battery-backed sensor nodes run for years on a single cell, while the USB port powers the diagnostics session and recharges the cell. The 53 GPIO provide ample headroom for LED status arrays, optocoupled inputs, and relay outputs.
推薦
Low-Power Battery Data Logger
The XLP architecture of the PIC24FJ128GB606-I/PT enables deep-sleep currents below 1 uA while keeping RAM retention, allowing the part to wake periodically from RTCC, sample a sensor, log to internal Flash, and return to sleep. The 128 KB Flash stores tens of thousands of timestamped samples, and the dual-partition layout means the logger application can be upgraded in the field by USB without risk. Industrial-grade -40C to +85C operation supports outdoor and cold-chain deployments.
推薦
Consumer Audio Accessory Controller
The PIC24FJ128GB606-I/PT powers USB audio accessories such as USB headsets, microphones, and speaker docks by combining full-speed USB audio class support with the 6 PWM channels for LED indicators and the 16-bit timers for sample-rate management. The 32 MHz core runs USB isochronous transfers at the standard 1 ms audio frame while leaving headroom for DSP-style sample-rate conversion. 128 KB Flash accommodates vendor-specific HID control panels for volume and mute.
推薦
Embedded Control Board with Field-Updatable Firmware
The dual-partition Live Update Flash of the PIC24FJ128GB606-I/PT enables fail-safe firmware updates over USB, UART, or ICSP, which is essential for embedded controllers shipped to customers where a failed update would mean a return-to-factory repair. The application runs from one partition while the new image is programmed to the other, then boot flags swap on next reset. The 32 KB RAM and 53 GPIO support real-time control loops, HMI displays, and multiple communication interfaces on the same board.
推薦
推薦產品摘要
工程參考資料，適用於 PIC24FJ128GB606-I/PT — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PIC24FJ128GA606-I/PT | PIC24FJ128GB606-E/PT | PIC24FJ128GA606-E/PT | PIC24FJ128GB410-I/PT | PIC24FJ128GA610-I/PT | PIC24FJ128GA006-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-TQFP (10x10) | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same | 64-TQFP (10x10) - same |
| Core Architecture | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit | PIC24F 16-bit |
| Flash Memory | 128 KB dual-partition + ECC | 128 KB | 128 KB dual-partition + ECC | 128 KB | 128 KB | 128 KB | 128 KB |
| USB OTG | Yes (integrated) | No | Yes | No | No | No | No |
| Live Update Dual-Partition Boot | Yes | Yes | Yes | Yes | No | Yes | No |
| CPU Clock (max) | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz | 32 MHz |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +125C (Extended) | -40C to +125C (Extended) | -40C to +85C | -40C to +85C | -40C to +85C |
| Approx. 100-piece Price (USD, as of 2026-09-29) | $3.62 | $3.45 | $4.20 | $4.00 | $3.30 | $3.55 | $3.20 |
主要差異化特點
- Integrated USB 2.0 full-speed OTG transceiver (對比PIC24FJ128GA006-I/PT)
- Dual-partition Flash with Live Update (對比PIC24FJ128GB410-I/PT)
- XLP eXtreme Low Power architecture (對比PIC24FJ128GA610-I/PT)
設計說明
Route the USB D+ and D- traces as a 90-ohm differential pair with length matching within 150 mil. Keep the traces short and away from switching regulator or PWM edges. Place the VUSB3V3 pin's 4.7 uF + 0.1 uF decoupling stack within 50 mil of the pin, and use a ground flood under the differential pair for return-current continuity. The 64-pin TQFP (PT) 10x10 mm package leaves room for a 4-layer stackup with continuous VDD and VSS planes, which is the recommended PCB layout per the family reference manual DS30009933.
Estimated: at 32 MHz CPU activity with USB enabled and average peripheral activity, the core consumption is around 20 mA plus 10 mA for the USB transceiver, giving ~30 mA total. With a 3.3V supply this is approximately 100 mW. The 64-pin TQFP has theta_JA around 50-60 C/W on a standard 4-layer JEDEC test board, so junction rise is roughly 5-7C above ambient. For USB suspend mode the XLP current drops below 1 mA, allowing bus-powered designs to meet the USB suspend current requirement.
Place all VDD-VSS decoupling capacitor pairs (0.1 uF ceramic) within 100 mil of every VDD pin. Use 10 uF bulk capacitors on each side of the package. The ICSP pins RB6 (ICSPDAT) and RB7 (ICSPCLK) must be accessible in production - do NOT route them only to internal layers. The MCLR reset pin requires a 10 kohm pull-up to VDD; omitting this pin's pull-up is a common cause of brown-out reset failures in production.
Configuration bits must be set in the IDE before programming - the default CONFIG1 uses the internal FRC oscillator with PLL disabled, which runs at 8 MHz not 32 MHz. The VUSB3V3 pin requires its 4.7 uF + 0.1 uF capacitor stack - USB enumeration will fail without it. When using Live Update, ensure the bootloader firmware is programmed first and the application partition pointers are configured per family reference manual section 53. Do not assume the 128 KB Flash is contiguous - the dual-partition layout means each partition is 64 KB.
合規資訊
RoHS and lead-free compliance per Microchip product page. Not AEC-Q100 qualified - this is a general-purpose MCU, not automotive grade. Halogen-free status not stated in verified data; refer to Microchip material declaration for confirmation.
