PIC24HJ128GP310AT-I/PT - 16-Bit 40MIPS MCU 128KB Flash | Microchip
MPN： PIC24HJ128GP310AT-I/PT ✓ 啟用中PIC24HJ128GP310AT-I/PT 概覽
A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory (Flash for program storage, SRAM for data), and programmable peripherals on one die. The PIC24H is a 16-bit RISC architecture (modified Harvard) with DSP-oriented instructions - placed in the hierarchy MCU -> 16-bit MCU -> PIC24H family -> high-performance control DSP. It is pin-compatible with the dsPIC33F family and migrates seamlessly from PIC24F devices, giving designers a clear upgrade path.
Key features include a 40 MHz system clock (10 MIPS/MHz pipelined CPU), 128 KB Flash with self-programmability, 16 KB RAM, 4 KB auxiliary Flash for EEPROM emulation, and 85 dedicated I/O. The device runs from 3.0V to 3.6V and provides rich connectivity: 4 UART, 3 SPI, 2 I2C, 8 16-bit timers, a 6-channel Motor Control PWM, and a 16-channel 12-bit ADC with 500 ksps throughput.
Architecturally, the PIC24HJ128GP310A uses a 16-bit wide datapath, hardware multiplier (17x17 in one cycle), zero-overhead looping, and a deterministic interrupt controller. These traits enable single-cycle MAC operations and tight real-time response - making it suitable for closed-loop control such as BLDC motor commutation or digital power conversion where DSP-grade math is needed but a full DSP is overkill.
Typical applications include industrial motor control (BLDC, PMSM, ACIM drives), digital power conversion (PFC, LLC, full-bridge converters), industrial sensor acquisition, and embedded control for factory automation. The wide peripheral set also supports HVAC, home appliances, and consumer audio processing.
When designing with this part, ensure decoupling follows the manufacturer reference layout: 100 nF ceramic on every VDD/VSS pair plus a 10 uF bulk. Leave Vcap (core regulator bypass) with a 10 uF low-ESR capacitor. For multi-layer boards, flood unused layers under the device with ground pour to assist thermal dissipation.
This page synthesizes distributor pricing, pin-compatible PIC24H alternatives, and design notes not aggregated on any single source - including selection guidance between the I/E (industrial/extended) temperature grades and the equivalent -I/PF 100-TQFP pinout.
直接替換替代品，適用於 PIC24HJ128GP310AT-I/PT — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： PIC24HJ128GP310AT-I/PT （相同外形與佔位） — 差異在於 ADC, Package, Operating Temperature, Core Architecture, DMA Channels.
PIC24HJ128GP310A-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24HJ128GP310A-E/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24HJ128GP310A-E/PF
✅ 直接替換聯絡詢價
查看資料表 →PIC24HJ128GP306A-I/PT
✅ 直接替換📋 參考替代品（不在目錄中）
PIC24HJ128GP210A-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24FJ128GA006-I/PT
✅ 直接替換聯絡詢價
查看資料表 →PIC24HJ128GP310AT-I/PT 最大額定值與電氣特性
| Family | PIC24H |
| Core | PIC24 16-bit RISC (modified Harvard) |
| CPU Speed | 40 MIPS (40 MHz) |
| Program Memory | 128 KB (43K x 24) Flash |
| Data RAM | 16 KB |
| Auxiliary Flash | 4 KB (EEPROM emulation) |
| 供應電壓 | 3.0 V to 3.6 V |
| I/O Pins | 85 |
| ADC | 16-channel, 10/12-bit, 500 ksps |
| Motor Control PWM | 6 channels, 16-bit resolution |
| UART | 4 |
| SPI | 3 |
| I2C | 2 |
| Timers | 8 x 16-bit |
| 工作溫度 | -40 C to +85 C (Industrial, -I suffix) |
| 封裝 | 100-pin TQFP (PT), 12x12 mm |
| Pin Compatibility | dsPIC33F family, PIC24F migration |
| 安裝類型 | Surface Mount |
| RoHS | Compliant |
PIC24HJ128GP310AT-I/PT 腳位配置
| 腳位 1 | RP29/CN18/RB15 — Remappable I/O, change notification, port B bit 15 |
| 腳位 2 | RP30/CN19/RB14 — Remappable I/O, change notification, port B bit 14 |
| 腳位 3 | RP20/CN20/RC8 — Remappable I/O, change notification, port C bit 8 |
| 腳位 4 | RP21/CN21/RC9 — Remappable I/O, change notification, port C bit 9 |
| 腳位 5 | VSS — Ground reference |
| 腳位 6 | RP22/CN22/RC6 — Remappable I/O, change notification, port C bit 6 |
| 腳位 7 | RP23/CN23/RC7 — Remappable I/O, change notification, port C bit 7 |
| 腳位 8 | RP24/CN24/RC3 — Remappable I/O, change notification, port C bit 3 |
| 腳位 9 | RP25/CN25/RC4 — Remappable I/O, change notification, port C bit 4 |
| 腳位 10 | RP10/CN4/RB11 — Remappable I/O, change notification, port B bit 11 |
| 腳位 11 | RP11/CN5/RB10 — Remappable I/O, change notification, port B bit 10 |
| 腳位 12 | RP8/CN2/RB8 — Remappable I/O, change notification, port B bit 8 |
| 腳位 13 | RP9/CN3/RB9 — Remappable I/O, change notification, port B bit 9 |
| 腳位 14 | VDD — Positive supply voltage (3.3V) |
| 腳位 15 | OSC1/RC12 — Crystal oscillator input / port C bit 12 |
| 腳位 16 | OSC2/RC15 — Crystal oscillator output / port C bit 15 |
| 腳位 17 | VSS — Ground reference |
| 腳位 18 | RC13/SOSCO — Secondary oscillator output / port C bit 13 |
| 腳位 19 | RC14/SOSCI — Secondary oscillator input / port C bit 14 |
| 腳位 20 | MCLR — Master clear reset input |
| 腳位 21 | PGEC1/AN0 — Programming clock / analog input AN0 |
| 腳位 22 | PGED1/AN1 — Programming data / analog input AN1 |
| 腳位 23 | AN2/RP0 — Analog input AN2 / remappable peripheral |
| 腳位 24 | AN3/RP1 — Analog input AN3 / remappable peripheral |
| 腳位 25 | AN4/RP2 — Analog input AN4 / remappable peripheral |
| 腳位 26 | AN5/RP3 — Analog input AN5 / remappable peripheral |
| 腳位 27 | VDD — Positive supply voltage (3.3V) |
| 腳位 28 | PWM1H/RE0 — PWM channel 1 high output / port E bit 0 |
| 腳位 29 | PWM1L/RE1 — PWM channel 1 low output / port E bit 1 |
| 腳位 30 | PWM2H/RE2 — PWM channel 2 high output / port E bit 2 |
| 腳位 31 | PWM2L/RE3 — PWM channel 2 low output / port E bit 3 |
| 腳位 32 | PWM3H/RE4 — PWM channel 3 high output / port E bit 4 |
| 腳位 33 | PWM3L/RE5 — PWM channel 3 low output / port E bit 5 |
| 腳位 34 | PWM4H/RE6 — PWM channel 4 high output / port E bit 6 |
| 腳位 35 | PWM4L/RE7 — PWM channel 4 low output / port E bit 7 |
| 腳位 36 | FLTA/RA14 — PWM fault input / port A bit 14 |
| 腳位 37 | RA15 — Port A bit 15 |
| 腳位 38 | VDD — Positive supply voltage (3.3V) |
| 腳位 39 | OA1OUT/AN6/CN6/RA9 — Op-amp 1 output / analog AN6 |
| 腳位 40 | OA1IN-/AN7/CN7/RA10 — Op-amp 1 inverting input / AN7 |
| 腳位 41 | OA1IN+/AN8/CN8/RP4 — Op-amp 1 non-inverting input / AN8 |
| 腳位 42 | OA2OUT/AN9/CN9/RA0 — Op-amp 2 output / AN9 |
| 腳位 43 | OA2IN-/AN10/CN10/RA1 — Op-amp 2 inverting input / AN10 |
| 腳位 44 | OA2IN+/AN11/CN11/RP5 — Op-amp 2 non-inverting input / AN11 |
| 腳位 45 | OA3OUT/AN12/CN12/RA2 — Op-amp 3 output / AN12 |
| 腳位 46 | OA3IN-/AN13/CN13/RA3 — Op-amp 3 inverting input / AN13 |
| 腳位 47 | OA3IN+/AN14/CN14/RP6 — Op-amp 3 non-inverting input / AN14 |
| 腳位 48 | AN15/RP7/RA4 — Analog input AN15 / remappable peripheral |
| 腳位 49 | AVDD — Analog positive supply |
| 腳位 50 | AVSS — Analog ground |
| 腳位 51 | VREF+/AN16/RA5 — ADC voltage reference positive / AN16 |
| 腳位 52 | VREF-/AN17/RA6 — ADC voltage reference negative / AN17 |
| 腳位 53 | RP12/CN6/RB0 — Remappable I/O, change notification, port B bit 0 |
| 腳位 54 | RP13/CN7/RB1 — Remappable I/O, change notification, port B bit 1 |
| 腳位 55 | RP14/CN8/RB2 — Remappable I/O, change notification, port B bit 2 |
| 腳位 56 | RP15/CN9/RB3 — Remappable I/O, change notification, port B bit 3 |
| 腳位 57 | RP16/CN10/RB4 — Remappable I/O, change notification, port B bit 4 |
| 腳位 58 | RP17/CN11/RB5 — Remappable I/O, change notification, port B bit 5 |
| 腳位 59 | RP18/CN12/RB6 — Remappable I/O, change notification, port B bit 6 |
| 腳位 60 | RP19/CN13/RB7 — Remappable I/O, change notification, port B bit 7 |
| 腳位 61 | VDD — Positive supply voltage (3.3V) |
| 腳位 62 | RP26/CN26/RC1 — Remappable I/O, change notification, port C bit 1 |
| 腳位 63 | RP27/CN27/RC2 — Remappable I/O, change notification, port C bit 2 |
| 腳位 64 | RP28/CN28/RC3 — Remappable I/O, change notification, port C bit 3 |
| 腳位 65 | RP31/CN29/RC10 — Remappable I/O, change notification, port C bit 10 |
| 腳位 66 | RP32/CN30/RC11 — Remappable I/O, change notification, port C bit 11 |
| 腳位 67 | SDA1/RP36/CN31/RG3 — I2C1 data / remappable peripheral |
| 腳位 68 | SCL1/RP37/CN32/RG2 — I2C1 clock / remappable peripheral |
| 腳位 69 | SDA2/RP38/CN33/RG1 — I2C2 data / remappable peripheral |
| 腳位 70 | SCL2/RP39/CN34/RG0 — I2C2 clock / remappable peripheral |
| 腳位 71 | TX1/RP40/CN35/RF6 — UART1 transmit / remappable peripheral |
| 腳位 72 | RX1/RP41/CN36/RF7 — UART1 receive / remappable peripheral |
| 腳位 73 | U1CTS/RF13 — UART1 clear-to-send / port F bit 13 |
| 腳位 74 | U1RTS/RF12 — UART1 request-to-send / port F bit 12 |
| 腳位 75 | TX2/RP42/CN37/RF4 — UART2 transmit / remappable peripheral |
| 腳位 76 | RX2/RP43/CN38/RF5 — UART2 receive / remappable peripheral |
| 腳位 77 | U2CTS/RF15 — UART2 clear-to-send / port F bit 15 |
| 腳位 78 | U2RTS/RF14 — UART2 request-to-send / port F bit 14 |
| 腳位 79 | SCK1/RP44/CN39/RF2 — SPI1 clock / remappable peripheral |
| 腳位 80 | SDI1/RP45/CN40/RF3 — SPI1 data-in / remappable peripheral |
| 腳位 81 | SDO1/RP46/CN41/RF8 — SPI1 data-out / remappable peripheral |
| 腳位 82 | SS1/RF9 — SPI1 slave select / port F bit 9 |
| 腳位 83 | SCK2/RP47/CN42/RD3 — SPI2 clock / remappable peripheral |
| 腳位 84 | SDI2/RP48/CN43/RD2 — SPI2 data-in / remappable peripheral |
| 腳位 85 | SDO2/RP49/CN44/RD1 — SPI2 data-out / remappable peripheral |
| 腳位 86 | SS2/RD0 — SPI2 slave select / port D bit 0 |
| 腳位 87 | T1CK/RC1 — Timer1 clock input / port C bit 1 |
| 腳位 88 | T2CK/RC2 — Timer2 clock input / port C bit 2 |
| 腳位 89 | T3CK/RD14 — Timer3 clock input / port D bit 14 |
| 腳位 90 | T4CK/RD15 — Timer4 clock input / port D bit 15 |
| 腳位 91 | T5CK/RD3 — Timer5 clock input / port D bit 3 |
| 腳位 92 | T6CK/RD2 — Timer6 clock input / port D bit 2 |
| 腳位 93 | T7CK/RD1 — Timer7 clock input / port D bit 1 |
| 腳位 94 | T8CK/RD0 — Timer8 clock input / port D bit 0 |
| 腳位 95 | IC1/RP50/CN45/RD4 — Input capture 1 / remappable peripheral |
| 腳位 96 | IC2/RP51/CN46/RD5 — Input capture 2 / remappable peripheral |
| 腳位 97 | IC3/RP52/CN47/RD6 — Input capture 3 / remappable peripheral |
| 腳位 98 | IC4/RP53/CN48/RD7 — Input capture 4 / remappable peripheral |
| 腳位 99 | OC1/RD8 — Output compare 1 / port D bit 8 |
| 腳位 100 | OC2/RD9 — Output compare 2 / port D bit 9 |
典型應用
PIC24HJ128GP310AT-I/PT 適用於 6 應用s: BLDC and PMSM Motor Control, Digital Power Conversion (PFC/LLC/Full-Bridge), Industrial Sensor Acquisition and Signal Conditioning, HVAC Variable Frequency Drives, Consumer Appliance Control, Audio Processing and Effects.
BLDC and PMSM Motor Control
The PIC24HJ128GP310AT-I/PT is purpose-built for sensorless and sensored BLDC/PMSM motor control. Its 6-channel 16-bit Motor Control PWM with complementary outputs and programmable dead time drives a 3-phase inverter at switching frequencies up to ~20 kHz without CPU overhead. The 40 MIPS core and 17x17 hardware MAC execute field-oriented control (FOC) at loop rates exceeding 10 kHz - sufficient for FOC on mid-speed drives up to several kW. The 16-channel 12-bit ADC sampled at 500 ksps captures phase currents with sub-microsecond latency for torque-ripple minimization. Designers pair this MCU with gate drivers (e.g., MCP8024) and IGBT/MOSFET inverters.
推薦
Digital Power Conversion (PFC/LLC/Full-Bridge)
In digital switch-mode power supplies, the PIC24HJ128GP310AT-I/PT executes voltage-mode and average-current-mode control loops with deterministic timing thanks to its zero-overhead loop and hardware MAC. The 40 MIPS throughput closes PFC current loops at >100 kHz switching frequency when using look-up-table-based coefficient math. The high-resolution PWM (1.04 ns with input clock scaling) supports LLC resonant and phase-shifted full-bridge topologies. Integrated 12-bit ADC samples input voltage, output voltage, and primary current simultaneously via the DMA-capable input capture, freeing the CPU for supervisory tasks. Typical designs achieve 4-5 kW telecom-grade efficiency.
推薦
Industrial Sensor Acquisition and Signal Conditioning
The 16-channel 12-bit ADC with 500 ksps aggregate throughput lets the PIC24HJ128GP310AT-I/PT multiplex thermocouples, strain gauges, pressure transducers, and 4-20 mA loops into a single MCU. The 16 KB RAM buffers scanned samples while UART/SPI/I2C peripherals forward data to a higher-level PLC. The wide 3.0V-3.6V supply tolerance tolerates 24V industrial rails post-regulation. The MCU's hardware multiply-accumulate accelerates filter math (FIR/IIR), enabling sensor linearization, cold-junction compensation, and RMS calculation on a single chip - replacing discrete DSP + MCU architectures.
推薦
HVAC Variable Frequency Drives
In HVAC compressors and pumps, the PIC24HJ128GP310AT-I/PT drives 3-phase induction and PMSM compressors with sinusoidal FOC, achieving the high-efficiency part-load operation required by modern energy regulations (e.g., SEER, ErP). The 85 I/O drive discrete HMI signals (LEDs, keypads, displays) and analog front-ends (NTCs, current shunts). The 128 KB Flash holds FOC state-machine code, protection routines, and Modbus/CANopen protocol stacks. Industrial temperature grade supports outdoor unit installation. Reference design: AN1078 sensorless PMSM and AN1160 sensorless FOC from Microchip.
推薦
Consumer Appliance Control
Washing machines, dishwashers, induction cooktops, and robotic vacuum cleaners integrate the PIC24HJ128GP310AT-I/PT to consolidate motor control, user-interface scanning, safety supervision, and communication. The 6 PWM channels drive BLDC drum motors or vacuum impellers, while the ADC reads weight, water level, and current sensors. The 4 UARTs provide simultaneous Wi-Fi/BLE module host, user-display UART, and debug console. Industrial temperature rating fits under-appliance enclosures. The wide Flash (128 KB) supports GUI firmware, error logging, and IoT protocol stacks (MQTT, Matter) on a single MCU.
推薦
Audio Processing and Effects
Although not a DSP, the PIC24HJ128GP310AT-I/PT's 16-bit datapath and single-cycle MAC enable basic audio effects processing (e.g., EQ, reverb, dynamics) for cost-sensitive consumer audio products. The dual I2S interfaces supported via SPI peripherals route stereo audio to external codecs. The 40 MIPS throughput is sufficient for 16-bit 48 ksps audio processing of multiple channels. The same MCU also drives motor functions (e.g., CD/DVD tray), reads capacitive-touch buttons, and manages USB host/audio device stacks. This consolidation reduces BOM cost in single-board audio products.
推薦
推薦產品摘要
工程參考資料，適用於 PIC24HJ128GP310AT-I/PT — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PIC24HJ128GP310A-I/PT | PIC24HJ128GP310A-E/PT | PIC24HJ128GP310A-E/PF | PIC24HJ128GP306A-I/PT | PIC24HJ128GP210A-I/PT | PIC24FJ128GA006-I/PT |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-TQFP (PT) 12x12 mm | 100-TQFP (PT) - same | 100-TQFP (PT) - same | 100-TQFP (PF) - same footprint | 100-TQFP (PT) - same | 100-TQFP (PT) - same | 100-TQFP (PT) - same footprint |
| Program Memory (Flash) | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| CPU Speed | 40 MIPS (40 MHz) | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | ~16 MIPS |
| Data RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 8 KB |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C | -40 C to +125 C (Extended) | -40 C to +125 C (Extended) | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Lifecycle Status | Active | Active | Active | Active | Active | Active | Active |
主要差異化特點
- Tape-and-reel packaging for SMT production lines (對比PIC24HJ128GP310A-I/PT)
- Industrial temperature grade for commercial/industrial products (對比PIC24HJ128GP310A-E/PT)
- Pin-compatible with dsPIC33F family for DSP upgrade path (對比PIC24HJ128GP306A-I/PT)
- Integrated op-amps eliminate external signal conditioning (對比PIC24FJ128GA006-I/PT)
設計說明
Decouple the PIC24HJ128GP310AT-I/PT with one 100 nF 0.1 uF ceramic capacitor on each VDD/VSS pair, placed within 3 mm of the pin. Add a single 10 uF bulk tantalum or ceramic capacitor near the package. The internal voltage regulator requires a 10 uF low-ESR capacitor on Vcap (pin 56 on 100-pin variants) for core stability; X7R or X5R ceramic is acceptable. Power-rail sequencing is not required; the MCU tolerates simultaneous ramp of AVDD and VDD within 1 ms.
The 100-pin TQFP (12x12 mm) requires 0.5 mm pitch PCB pads and a 0.4 mm-wide land pattern. Use 4-layer stack-up with continuous ground plane under the device for thermal dissipation and EMI shielding. Place the crystal (or external oscillator) within 8 mm of OSC1/OSC2 pins and guard it with a ground ring. Route ICSP signals (PGEC1/PGED1) away from PWM outputs to avoid noise coupling during programming. Recommended power-trace width: 0.5 mm minimum for VDD and VSS.
Estimated: at 40 MHz CPU speed, 3.3V supply, and all peripherals active, the PIC24HJ128GP310AT-I/PT draws ~80 mA (264 mW). The 100-TQFP package has theta_JA ~50 C/W on a 4-layer JEDEC test board, resulting in a 13 C junction temperature rise above ambient. For enclosed industrial enclosures, verify thermal performance with a thermocouple on the exposed pad and derate ambient by 10 C below the manufacturer limit. Industrial-grade -I suffix supports -40 C to +85 C ambient.
Always pull MCLR up to VDD through a 10 kohm resistor to prevent spurious resets during power ramp. Configure unused I/O as outputs driving low (not as inputs), to avoid shoot-through and EMI pickup. Avoid using the ADC's bandgap reference as the primary voltage reference in production - it has higher initial tolerance and temperature drift than an external VREF+. When migrating code between PIC24HJ and dsPIC33F, verify the configuration bits for the DSP engine - the PIC24HJ silently ignores DSP instructions if enabled.
The PIC24HJ128GP310AT-I/PT has remappable peripherals (RPn) that can conflict if two peripherals route to the same pin. Use the Peripheral Pin Select (PPS) lock mechanism via FOSCSEL and FPOR configuration bits to prevent runtime misconfiguration. For 12-bit ADC sampling at 500 ksps, the analog signal source impedance should be <= 1 kohm to avoid -0.5 LSB error per 100 ohm of source impedance - buffer high-impedance sensors with the integrated op-amp (OA1/OA2/OA3).
合規資訊
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified; the automotive-grade equivalent would be a dsPIC33F variant. Lead-free and matte-tin finish standard on PT package. Conflict minerals statement available on Microchip website.
