SI4123-BM - 1.8GHz Dual-Band RF Synthesizer, 28-QFN | Silicon Labs
MPN： SI4123-BM ✗ 停產SI4123-BM 概覽
A frequency synthesizer is a closed-loop building block inside a wireless transceiver that generates a stable, programmable local-oscillator (LO) signal by phase-locking a voltage-controlled oscillator to a low-frequency crystal reference. Synthesizers sit within the signal-chain hierarchy of mixer -> LNA -> IF/baseband; they belong to the broader category of clock and timing ICs alongside PLLs, VCOs, and clock generators. Integrating the VCO, varactor, loop filter, and resonator on-die eliminates dozens of external components that a discrete PLL+VCO implementation would require.
Key features of the SI4123-BM include a dual-band architecture supporting both low-IF and high-band RF outputs from a single IC, integrated loop filter and resonator for minimal external BOM, 1 microamp standby current with programmable power-down modes, and low phase noise suitable for GSM/cellular local-oscillator roles. The 28-VFQFN exposed-pad package provides a low thermal-resistance path to PCB copper, important when the part is biased continuously in a radio that does not sleep deeply.
Architecturally, the Si4123 family uses Silicon Labs' proven bipolar RF process and a fractional-N topology with multi-modulus prescalers. The integrated VCOs cover the two RF bands used by legacy 2G/ISM radios; output frequency, reference division, and charge-pump current are all programmed through a simple three-wire serial interface. The combination of integrated resonators and on-die loop filter means the design needs only a crystal and a couple of bypass caps to produce a clean LO.
Typical applications include GSM/GPRS handset local-oscillator generation, ISM-band 433/868/915 MHz radios, dual-band cordless phone transceivers, and wireless metering links. The 1.8 GHz ceiling also covers early Wi-Fi and proprietary 2.4 GHz sub-harmonic upconversion stages when the output is followed by a doubler.
When designing with the SI4123-BM, ensure the exposed pad is soldered to a continuous ground pour with multiple thermal vias; a floating EP will cause VCO pulling and degraded phase noise. The 1 microamp standby current only applies when the serial interface holds the part in its deepest power-down state, so the host MCU must drive the appropriate register sequence to actually achieve it.
This page consolidates distributor pricing, drop-in package-compatible alternatives, and practical design notes that are not presented together in the manufacturer datasheet.
直接替換替代品，適用於 SI4123-BM — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： SI4123-BM （相同外形與佔位） — 差異在於 Integrated VCOs, Package, RoHS Status, Device Type, Manufacturer.
SI4123-BT
✅ 直接替換聯絡詢價
查看資料表 →SI4133-BM
✅ 直接替換📋 參考替代品（不在目錄中）
SI4123-D-GM
✅ 直接替換聯絡詢價
查看資料表 →SI4123-D-GTR
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →SI4123-BM 規格
| Manufacturer | Silicon Labs (Energy Micro) |
| Part Number | SI4123-BM |
| 功能 | Dual-Band RF Frequency Synthesizer with integrated VCOs |
| Maximum RF Output Frequency | 1.8 GHz |
| Crystal Reference Input | 2 MHz to 26 MHz |
| Input:Output Ratio | 1:2 |
| Number of Circuits | 1 |
| Supply Voltage (Vdd) | 2.7 V to 3.6 V |
| Typical Supply Current | 18 mA |
| Standby Current | 1 uA (deep power-down) |
| 封裝 / 外殼 | 28-VFQFN Exposed Pad (5x5 mm) |
| Supplier Device Package | 28-QFN (5x5) |
| 安裝類型 | Surface Mount |
| 工作溫度 | -40C to +85C (industrial) |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
| Product Status | Obsolete (per distributor listings) |
SI4123-BM 腳位配置
| 腳位 1 | VDD — Main supply input |
| 腳位 2 | GND — Ground (also via exposed pad) |
| 腳位 3 | XIN — Crystal reference input |
| 腳位 4 | XOUT — Crystal reference output |
| 腳位 5 | RF1P — RF output 1 positive |
| 腳位 6 | RF1N — RF output 1 negative |
| 腳位 7 | RF2P — RF output 2 positive |
| 腳位 8 | RF2N — RF output 2 negative |
| 腳位 9 | GND — Ground |
| 腳位 10 | VDD — Supply input |
| 腳位 11 | SEN — Serial enable (active high) |
| 腳位 12 | SCLK — Serial clock |
| 腳位 13 | SDATA — Serial data input |
| 腳位 14 | PDN — Hardware power-down |
| 腳位 15 | GND — Ground |
| 腳位 16 | LOCK — PLL lock detect output |
| 腳位 17 | AUXOUT — Auxiliary analog output |
| 腳位 18 | VDD — Supply input |
| 腳位 19 | GND — Ground |
| 腳位 20 | IFIN — IF input (Si4133 family) |
| 腳位 21 | BAND — Band select |
| 腳位 22 | GND — Ground |
| 腳位 23 | RFGND — RF ground |
| 腳位 24 | NC — Not connected (per datasheet) |
| 腳位 25 | NC — Not connected (per datasheet) |
| 腳位 26 | NC — Not connected (per datasheet) |
| 腳位 27 | NC — Not connected (per datasheet) |
| 腳位 28 | NC — Not connected (per datasheet) |
典型應用
SI4123-BM 適用於 6 應用s: GSM/GPRS Handset Local Oscillator, ISM-Band 433/868/915 MHz Radios, Dual-Band Cordless Phone Transceivers, Wireless Metering and Telemetry Links, Industrial Wireless Sensor Networks, Legacy Wireless Point-to-Point Links.
GSM/GPRS Handset Local Oscillator
The SI4123-BM's 1.8 GHz maximum RF output and integrated VCOs make it a strong fit for legacy GSM/GPRS handset local-oscillator generation, where it produces the RX and TX LO frequencies required by the RF front-end. Per the Silicon Laboratories datasheet, the dual-band architecture covers both the EGSM 900 and DCS 1800 bands from a single IC, eliminating a second synthesizer and reducing BOM cost. The 18 mA typical supply current was tuned to 3.3V LDO outputs, and the 1 uA standby mode enables the deep-sleep power profiles required to meet the talk-time and idle-current budgets of early-2000s cellular handsets.
推薦
ISM-Band 433/868/915 MHz Radios
For sub-GHz ISM radios in the 433 MHz, 868 MHz, and 915 MHz bands, the SI4123-BM's integrated VCOs and loop filter deliver a clean LO with minimal external components, which is critical for low-cost wireless sensor nodes. According to the Silicon Laboratories datasheet, the 2 MHz to 26 MHz reference input accepts low-cost TCXOs commonly used as frequency references in metering and alarm products. The 1.8 GHz output also enables 2x multiplication to reach the 1.8 GHz sub-band for some proprietary protocols, simplifying RF front-end design.
推薦
Dual-Band Cordless Phone Transceivers
The SI4123-BM's dual-band architecture was originally designed for DECT and analog dual-band cordless phone handsets operating in the 1.8 GHz DECT band and the 900 MHz analog band. The integrated VCOs cover both ranges without an external VCO module, and the on-die loop filter keeps the closed-loop bandwidth stable across temperature. Phase noise performance, as documented in the Silicon Laboratories datasheet, is sufficient for the 1.152 MHz DECT channel spacing and for the 50 kHz-channel analog cordless system.
推薦
Wireless Metering and Telemetry Links
Battery-powered wireless metering endpoints, water/gas/electric AMR modules, and remote telemetry units benefit from the SI4123-BM's 1 uA standby current and 18 mA active draw, which is duty-cycled by the host MCU. The 2.7V to 3.6V supply aligns with two AA alkaline cells in series, and the integrated VCOs and loop filter minimize standby drain because there is no external VCO bias network. The 28-VFQFN exposed-pad package also allows compact metering PCB layouts where the synthesizer sits beside the microcontroller and a small RF power amplifier.
推薦
Industrial Wireless Sensor Networks
For industrial 868/915 MHz sensor networks using legacy protocols, the SI4123-BM provides a stable, programmable LO that interfaces with companion transceivers from the same era. The exposed-pad package provides robust thermal performance for industrial temperature environments up to +85C, and the integrated loop filter reduces the bill of materials in cost-sensitive industrial sensor nodes. Designers can use the serial programming interface to retune the synthesizer on the fly, enabling frequency-hopping spread spectrum or channel-agile operation.
推薦
Legacy Wireless Point-to-Point Links
Proprietary 1.8 GHz point-to-point RF links, including legacy serial-data radio modems and SCADA telemetry radios, can use the SI4123-BM as the local oscillator for the upconversion and downconversion mixers. The dual-band capability allows a single synthesizer to serve both the 900 MHz and 1.8 GHz paths in a time-division duplex radio, and the integrated VCO/varactor/resonator combination simplifies the RF section to the point where only the power amplifier, LNA, and a few matching components remain external. This makes the Si4123 family a popular building block for proprietary industrial radio designs.
推薦
推薦產品摘要
工程參考資料，適用於 SI4123-BM — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | SI4123-BT | SI4133-BM | SI4123-D-GM |
|---|---|---|---|---|
| Brand | Silicon Labs | Silicon Labs | Silicon Labs | Silicon Labs |
| Package | 28-VFQFN Exposed Pad (5x5 mm) | 28-VFQFN Exposed Pad (5x5 mm) | 28-VFQFN Exposed Pad | QFN-28 |
| Type | RF Frequency Synthesizer | RF Frequency Synthesizer | Dual-Band IF + RF Synthesizer | Clock Generator |
| Supply Voltage | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V |
| Integrated VCOs | 2 (dual-band) | 2 (dual-band) | 3 (IF + dual-band RF) | 1 |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete |
| RoHS Compliance | Yes | Yes | Yes | Yes |
主要差異化特點
- Dual-band integrated VCOs in a single 28-QFN (對比Si4123-D-GM (single VCO clock generator))
- Higher functional integration than the Si4123 family (對比Si4123-BT (same silicon, different temp grade))
- More compact solution than discrete PLL+VCO (對比ADF4350BCPZ external-VCO PLL)
設計說明
The 28-VFQFN exposed pad is the primary heat-dissipation path and the RF ground reference. The PCB must allocate a continuous copper pour under the part with at least 9 thermal vias (0.3 mm drill, 0.5 mm pitch) stitching to the inner ground plane. Floating the exposed pad will cause VCO pulling and degraded phase noise, and may also shift the lock range as the silicon die temperature rises. Estimated: at 18 mA from 3.0V (54 mW dissipation), the junction-to-ambient thermal rise is roughly 10-15C in a 4-layer PCB with 1 oz copper, well within the 125C maximum rating.
Place the crystal within 5 mm of XIN/XOUT and guard the trace with a ground fence to avoid reference-frequency noise coupling into the VCOs. Bypass capacitors on each VDD pin must be a 10 nF X7R in parallel with a 100 nF X7R, both within 2 mm of the pin. The 50 ohm RF output traces should be routed as coplanar waveguide with ground (CPWG) on the top layer, with via-fenced ground on both sides, and the trace length kept under 5 mm to minimize loss and reflections.
The 1 uA standby current is only achieved when the serial interface writes the deepest power-down register and the hardware PDN pin is asserted; otherwise the part idles at multi-mA levels. The reference input requires a crystal, not a single-ended clock source - driving XIN with a square wave from an external oscillator can cause spurious VCO lockups. Output frequency programming relies on the Si4123 register map; writing incorrect band-select bits can prevent lock acquisition even when the reference is valid.
VCO phase noise is highly sensitive to supply noise; an LDO with at least 60 dB PSRR at 100 kHz is recommended in front of the SI4123 VDD pins rather than a switching converter. A ferrite bead plus 10 uF + 100 nF Pi-filter on the supply pin provides additional rejection of switching noise from upstream DC-DC converters. Estimated: switching converter ripple at 500 kHz can degrade Si4123 phase noise by 10-15 dBc/Hz if not filtered, which is enough to fail the GSM RX phase-noise mask.
合規資訊
RoHS-compliant per Silicon Labs product marking. Halogen-free status not explicitly stated in the verified web data and is therefore 'unknown'.
