SI8902D - 10-Bit Isolated Monitoring ADC w/ SPI | Skyworks
MPN： SI8902D ✓ 啟用中SI8902D 概覽
An isolated ADC (also called a digital isolator with an integrated ADC, or an isolated data converter) is a mixed-signal component that samples an analog signal referenced to a high-voltage or ground-isolated domain, converts it to a digital code, and transfers the code across an isolation barrier using capacitive or transformer coupling. In the broader taxonomy, this part is a SAR ADC (sub-type of data converter) that adds an isolation barrier, so it sits at the junction of power management, signal conditioning, and industrial interface ICs.
Key features include 10-bit resolution, single-ended analog inputs with a programmable-gain front end optimized for current-sense or bus-voltage measurements, an SPI interface for host communication, and a 45 kV/us common-mode transient immunity (CMTI) rating. The integrated 2.5 kV isolation eliminates the need for a separate optocoupler or digital isolator, simplifying BOM and improving long-term reliability vs optocoupler-based designs that suffer from aging of the LED transfer gain.
Architecturally, the SI8902D uses a capacitive-coupled isolation barrier that passes the ADC's serial output across the isolation barrier with a refresh mechanism on the low-side, avoiding the current-transfer-ratio (CTR) drift that optocouplers exhibit over temperature and time. The SAR core delivers deterministic acquisition with no latency, suitable for closed-loop control of switching converters where feedback delay degrades loop phase margin.
Typical applications include isolated current/voltage monitoring in solar inverters, telecom rectifier modules, industrial PLC analog front-ends, motor-drive phase monitoring, and isolated sensor readbacks. The wide 2.7 V to 3.6 V supply range on the low-side digital interface and the high-side analog supply up to 5 V make it compatible with both 3.3 V MCUs and 5 V analog front-ends.
Designers should place 0.1 uF bypass capacitors on both the high-side VDD and low-side VDD pins, placed within 2 mm of the respective pins, to meet the CMTI specification under fast-switching transients. The 16-SOIC footprint has a standard 1.27 mm pin pitch, simplifying PCB layout reuse across other SO-16 isolators and ADCs.
This page synthesizes distributor inventory, parametric drop-in alternatives, and PCB-level design notes for the SI8902D - engineering content not found in the manufacturer datasheet alone.
直接替換替代品，適用於 SI8902D — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： SI8902D （相同外形與佔位） — 差異在於 Number of Input Channels, Package, Resolution.
SI8902D-A01-GS
✅ 直接替換聯絡詢價
查看資料表 →SI8901ED-A01-GS
✅ 直接替換📋 參考替代品（不在目錄中）
SI8903-A01-GS
✅ 直接替換📋 參考替代品（不在目錄中）
SI8902D 最大額定值與電氣特性
| 解析度 | 10 bits |
| Number of Input Channels | 3 (single-ended) |
| ADC Architecture | SAR (Successive Approximation Register) |
| Input Configuration | Single-ended, programmable gain front end |
| Digital Interface | SPI-compatible (Serial) |
| Supply Voltage (low-side) | 2.7 V to 3.6 V |
| Isolation Voltage Rating | 2.5 kV RMS |
| Common-Mode Transient Immunity | 45 kV/us |
| 封裝 | 16-SOIC (0.295", 7.50 mm body width) |
| 安裝類型 | Surface Mount |
| Pin Pitch | 1.27 mm |
| 工作溫度 | -40 C to +85 C (industrial grade) |
| RoHS 狀態 | Compliant |
SI8902D 腳位配置
| 腳位 1 | SCLK — SPI serial clock input (low-side) |
| 腳位 2 | CS — SPI chip select, active-low (low-side) |
| 腳位 3 | SDO — SPI serial data output (low-side) |
| 腳位 4 | SDI — SPI serial data input (low-side) |
| 腳位 5 | GND1 — Low-side digital ground |
| 腳位 6 | VDD1 — Low-side digital supply (2.7-3.6 V) |
| 腳位 7 | RESET — Device reset input (low-side) |
| 腳位 8 | NC — Not connected (per datasheet) |
| 腳位 9 | GND2 — High-side analog ground |
| 腳位 10 | AIN2 — Analog input channel 2 (high-side) |
| 腳位 11 | AIN1 — Analog input channel 1 (high-side) |
| 腳位 12 | AIN0 — Analog input channel 0 (high-side) |
| 腳位 13 | VDD2 — High-side analog supply |
| 腳位 14 | AGND — Analog ground reference |
| 腳位 15 | REF — Reference voltage input |
| 腳位 16 | NC — Not connected (per datasheet) |
典型應用
SI8902D 適用於 6 應用s: Solar Inverter String Current Monitoring, Telecom Rectifier Module Voltage Sensing, Industrial PLC Analog Input Module, Motor Drive Phase Current Feedback, Isolated Battery Management Voltage Sense, Medical Patient Monitoring Isolated Readout.
Solar Inverter String Current Monitoring
In solar inverter PV-string monitoring, the SI8902D digitizes per-string current across the high-voltage DC bus barrier with 10-bit resolution and 45 kV/us CMTI. The 2.5 kV isolated SPI output feeds a 3.3 V MCU for MPPT calculation, eliminating the optocoupler normally required for isolated bus sensing. Input channels (3 per chip) parallel directly to three string shunts, supporting residential 3-string combiners without multiplexing complexity. The Si8902D's wide -40C to +85C range covers outdoor inverter operating conditions where optocoupler CTR drift would otherwise degrade accuracy within a few years of field deployment.
推薦
Telecom Rectifier Module Voltage Sensing
In 48 V telecom rectifier modules, the SI8902D's programmable-gain front end scales the -48 V bus shunt to within the ADC's input range and presents the result over SPI to a hot-swap controller. The 2.5 kV barrier isolates the MCU's 3.3 V domain from the -48 V AVDD rail, essential for compliance with IEC 62368-1 safety clearances. The 3-input mux allows simultaneous monitoring of bus voltage, output current, and battery temperature using a single chip, reducing PCB area on densely populated rectifier PCBs where thermal management dominates layout. The 45 kV/us CMTI rate tolerates the ringing edges of the active PFC stage without false tripping or ADC corruption.
推薦
Industrial PLC Analog Input Module
The SI8902D suits isolated PLC analog input modules requiring 1000 V+ field-to-bus isolation and 10-bit digital readout to a backplane controller. Its 2.5 kV barrier is reinforced-isolated, and the device terminates directly onto 4-20 mA loop shunts or 0-10 V transducer signals. The three input channels map cleanly to a single channel of 4-channel PLC rack, supporting 12 V-isolated backplanes with reliable ADC noise floor versus optocoupler-coupled designs. This part also eases IEC 61010-1 compliance since the isolation barrier is built-in rather than implemented by the designer's optocoupler.
推薦
Motor Drive Phase Current Feedback
In three-phase motor drives, the SI8902D reads back shunt-resistor current from the inverter's negative DC bus and digitizes it across the high-side/low-side isolation barrier for FOC (field-oriented control) loops. Its 2.5 kV barrier is sufficient for 200-500 V drives; the 45 kV/us CMTI tolerates fast IGBT or SiC inverter switching edges without false triggering. Single-channel phase-feedback is acceptable since FOC algorithms typically run on the low-side controller, but the chip's three inputs can also support three-shunt topologies when paired with a single MCU. Industrial grade temperature range from -40C to +85C covers motor-compartment thermal conditions.
推薦
Isolated Battery Management Voltage Sense
The SI8902D's high CMTI and 2.5 kV isolation make it a fit for isolated cell monitoring in high-voltage battery management systems (BMS), where the cell-tap voltage is referenced to a high-voltage stack and must be digitized before transmission to the ground-referenced BMS controller. The 10-bit resolution typically yields 30-100 mV cell-level resolution for 12-60 V modules depending on divider ratio, supporting balancing decisions. Its three inputs allow a single chip to monitor up to three battery cells or cell-pair voltages, reducing per-cell monitoring cost versus discrete isolator plus ADC architectures.
推薦
Medical Patient Monitoring Isolated Readout
Although not life-critical, the SI8902D can be used in medical patient-isolation modules where 2.5 kV of patient-to-system isolation is required to meet IEC 60601-1 patient leakage limits. Its 10-bit ADC delivers the resolution needed to monitor temperature, perfusion, or low-frequency vital channels coming through analog front-ends. The integrated isolation saves PCB real estate versus a discrete ADC + reinforced isolator pair, which is valuable in small form-factor bedside sensors. Engineers should verify complete system-level IEC 60601-1 compliance beyond the component rating alone before clinical deployment.
推薦
推薦產品摘要
工程參考資料，適用於 SI8902D — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | SI8902D-A01-GS | SI8901ED-A01-GS | SI8903-A01-GS |
|---|---|---|---|---|
| Package | 16-SOIC (wide-body) | 16-SOIC (wide-body) - same | 16-SOIC (wide-body) - same | 16-SOIC (wide-body) - same |
| Brand | Skyworks | Skyworks - same | Skyworks - same | Skyworks - same |
| Resolution | 10 bits | 10 bits | 12 bits | 12 bits |
| Number of Input Channels | 3 single-ended | 3 single-ended | 2 single-ended | 1 single-ended |
| Isolation Voltage | 2.5 kV RMS | 2.5 kV RMS | 2.5 kV RMS | 2.5 kV RMS |
| Digital Interface | SPI | SPI | SPI/UART | SPI |
主要差異化特點
- Higher CMTI than typical optocoupler-based ADC isolation (對比Discrete ADC + optocoupler isolation)
- Three single-ended channels in one isolated ADC (對比SI8903-A01-GS (1 channel))
- 10-bit native resolution tuned for monitoring vs metering (對比SI8901ED-A01-GS (12-bit))
設計說明
Place 0.1 uF X7R ceramic bypass capacitors within 2 mm of pins 6 (VDD1) and 13 (VDD2). The SI8902D's 45 kV/us CMTI rating depends on clean, low-impedance local supply decoupling to ride out high-speed common-mode transients on the high-side ground reference. Place a ferrite bead or 10 ohm resistor in series with VDD1 if the supply is shared with a digital isolator, to prevent switching-current noise from coupling into the ADC reference.
Route the analog input traces (AIN0/AIN1/AIN2) directly to the shunt resistors with minimal series inductance. Keep the GND2 ground plane unbroken beneath the high-side analog pins, separated from GND1 by the isolation barrier with at least 8 mm creepage and 0.4 mm clearance per 2.5 kV reinforced isolation requirements. The SOIC-16 wide-body gives the recommended 8 mm creepage; do not use narrow-body SOIC variants as a substitute.
Do not connect the GND1 (pin 5) and GND2 (pin 9) planes anywhere on the PCB - they are intentionally referenced to different ground domains and must remain separate. Avoid routing digital signals across the barrier underside; signals crossing the isolation barrier must travel through the Si8902D's internal capacitor isolation, not on the PCB. Also, do not place any decoupling capacitor across the barrier - it defeats the galvanic isolation.
Estimated: At AVDD=5V, 3 active channels @ full-scale sampling rate ~200 ksps, the SI8902D total supply current is approximately 30 mA typical, of which ~10 mA flows on the high side. Power dissipation is therefore about 50 mW total worst case. With theta_JA = 90 C/W on the 16-SOIC, the temperature rise over 25 C ambient is only 4.5 C; no heatsink is required.
合規資訊
RoHS and REACH compliant per Skyworks product page; AEC-Q100 qualification not applicable for industrial-grade isolated ADC; halogen-free status [DATA_NEEDED].
