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CS5335-KS - 20-Bit Stereo Audio ADC | Cirrus Logic
CS5335-KS

CS5335-KS - 20-Bit Stereo Audio ADC | Cirrus Logic

The Cirrus Logic CS5335-KS is a 20-bit, two-channel, single-supply stereo analog-to-digital converter for digital audio systems, with an analog sampling bandwidth of 2 kHz to 50 kHz in a 20-pin SSOP package. It accepts a single +5 V supply and generates serial digital output for left and right audio channels while performing sampling, analog-to-digital conversion, and anti-alias filtering. An audio ADC is a specialized data-conversion IC that converts continuous left- and right-channel analog audio signals into discrete digital words for processing, storage, transmission, or playback. In the component hierarchy, the CS5335-KS is an ADC, a data converter, and an interface IC used in digital audio equipment. Its 20-bit conversion resolution preserves a substantial amount of amplitude detail, while its stereo architecture supports simultaneous or paired-channel digital audio acquisition. The key verified features of the CS5335-KS are 20-bit resolution, two analog input channels, a 2 kHz-to-50 kHz signal bandwidth, one +5 V supply, and serial output for both channels. These characteristics make the converter suitable for consumer and professional audio systems that require more precision than a conventional 8-bit or 16-bit audio converter. The SSOP package also supports compact, surface-mounted circuit-board implementations. The CS5335 performs analog-to-digital conversion as part of a signal chain that also includes anti-alias filtering. This integrated filtering helps remove higher-frequency content before the sampled data is converted into its digital representation. The available verified data does not state the internal converter architecture, clocking requirements, dynamic range, total harmonic distortion, input impedance, or output logic format, so those characteristics should be confirmed in the manufacturer datasheet before a precision audio design is released. Typical uses include digital audio mixers, stereo playback and recording equipment, consumer audio appliances, sound-card signal paths, and industrial monitoring systems with audio inputs. In each case, the converter can sit after analog input conditioning and provide serial digital channel data to a DSP, codec, microcontroller, or storage interface. The available sources identify the CS5335 as a stereo converter for digital audio rather than as a general-purpose instrumentation ADC. The primary design consideration is verification of the electrical interface. Designers should obtain the CS5335 pinout, confirm the analog input and output pin assignments, determine the required master clock and data-format settings, and calculate decoupling and layout requirements from the manufacturer datasheet. The verified web results identify the 20-SSOP package but do not provide a complete public pin table, so the pinout is not reproduced here to avoid inaccurate connections. This page combines verified distributor specifications, package and channel details, pricing, source links, selection guidance, and application-specific engineering notes. It also distinguishes the documented CS5335-KS characteristics from parameters that remain unavailable, helping engineers identify what can be confirmed immediately and what must be checked in the official data.

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CS5351-BS 108 dB 192 kHz Audio ADC | Cirrus Logic
CS5351-BS

CS5351-BS 108 dB 192 kHz Audio ADC | Cirrus Logic

The Cirrus Logic CS5351-BS is a 108 dB, 192 kHz multi-bit audio analog-to-digital converter designed for digital audio systems. It combines sampling, A/D conversion, and anti-alias filtering in a single IC, while producing 24-bit serial data for left and right channels. The converter is supplied in the -BS package configuration for compact, surface-mount audio equipment and supports the high-resolution, high-sample-rate requirements of professional audio and consumer audio applications. An audio ADC is a data-converter IC that accepts analog left and right audio signals and converts them into digital words suitable for transmission, recording, playback, or digital signal processing. In the broader component hierarchy, the CS5351-BS is an ADC, a data converter, and a specialized digital-audio integrated circuit. Its integrated anti-alias filtering reduces the need for separate external analog filtering before the conversion stage. The CS5351 uses a fifth-order, multi-bit Delta-Sigma modulator followed by digital filtering and decimation. This architecture is intended to support 24-bit conversion results at sample rates up to 192 kHz per channel. The manufacturer identifies the device as a complete analog-to-digital converter for digital audio systems, and the available product information describes overflow detection for both left and right channels, with the multiplexed overflow indication presented as an active-low open-drain signal on pin 15. The device is intended for applications where accurate stereo capture and high-resolution digital representation are valuable. Typical uses include professional digital audio equipment, multichannel recording systems, consumer audio processors, digital mixers, and high-performance playback or monitoring equipment. The 192 kHz per-channel rate supports very high-bandwidth digital audio workflows, while the 108 dB dynamic-range figure defines the principal signal-to-noise performance target. Because the CS5351-BS is an integrated converter, board layout and power-supply design remain important even when no external anti-alias filter is required. The analog and digital sections should be routed according to the manufacturer datasheet, with attention to grounding, decoupling, clock integrity, and keeping switching or high-current digital signals away from the analog inputs. The CS5351 family is marked NRND, so lifecycle planning should confirm availability or an approved replacement before beginning a long-running production design. This page combines manufacturer information, distributor availability, lifecycle status, and application guidance to provide an engineering-focused overview. It also distinguishes documented CS5351-BS facts from parameters that require confirmation in the manufacturer datasheet, helping designers evaluate the converter without treating incomplete specifications as verified production data.

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CS5371-BS 24-Bit 512k Serial Modulator | Cirrus Logic
CS5371-BS

CS5371-BS 24-Bit 512k Serial Modulator | Cirrus Logic

The Cirrus Logic CS5371-BS is a low-power, high-performance special-purpose modulator with a 24-bit resolution, a 512 kHz serial interface, and a 24-SSOP package. The device is categorized by distributors as an ADC/DAC and modulator product, making it suitable for precision signal-conversion systems that require a serial digital stream rather than a conventional parallel data bus. Its advertised 512 kHz serial rate supports high-speed digital signal processing while the 24-bit representation provides fine quantization granularity. A delta-sigma modulator is a specialized signal-processing IC that converts an analog input into a high-speed, low-resolution bit stream whose average value represents the sampled analog signal. Within the ADC/DAC hierarchy, this type of modulator sits between a general-purpose data converter and a digital filter or decimator. It is especially useful when a downstream processor can reconstruct or process the filtered bit stream, allowing converter performance to be distributed across analog input conditioning and digital reconstruction. The CS5371-BS combines three principal characteristics: 24-bit modulator resolution, a 512 kHz serial interface, and low-power operation. Cirrus Logic also identifies a power-down mode as a device feature. This combination supports designs in which the modulator is enabled only when conversion is required. The 24-SSOP package provides a conventional surface-mount form factor, while the available distributor data confirms its 24-pin package designation. According to the manufacturer data referenced by the distributor sources, CS5371 and CS5372 inputs must be bandwidth-limited to preserve loop stability and prevent aliased high-frequency signals. The modulators use a fourth-order architecture and are conditionally stable, making input filtering a critical part of the signal chain. A poorly selected antialias filter can therefore produce stability problems or allow high-frequency content to fold into the useful measurement band. Typical uses include industrial measurement systems, communication equipment, instrumentation, and digital signal-processing front ends. In each case, the serial interface can feed a digital filter or decimator, while the low-power characteristic benefits portable or intermittently operated equipment. Applications requiring a complete high-resolution ADC should also evaluate the external filter, clocking, reconstruction circuitry, and downstream processor rather than treating the modulator as a standalone converter. Designers should place the input antialias network close to the modulator and verify stability across the full input range, clock frequency, and output-load conditions. Because the device is conditionally stable, operating conditions outside the recommended input bandwidth deserve particular attention. Exact supply voltage, reference requirements, clock range, current consumption, and performance limits require confirmation from the manufacturer datasheet before layout or production release. This product page consolidates verified distributor specifications, package information, pricing signals, same-family alternatives, and practical stability guidance. It also distinguishes documented facts from parameters that still require direct manufacturer confirmation, helping engineers assess fit without filling specification gaps with assumptions.

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CS5372-BS - 24-Bit Dual ΔΣ Modulator | Cirrus Logic
CS5372-BS

CS5372-BS - 24-Bit Dual ΔΣ Modulator | Cirrus Logic

Cirrus Logic CS5372-BS is a low-power, high-performance, two-channel, fourth-order delta-sigma modulator designed for precision measurement systems. The device operates from a 24-bit serial interface at up to 512 kS/s and is offered in a 24-pin SSOP package. Its modulator architecture is intended for geophysical, sonar, and other high-dynamic-range sensor-acquisition applications. A delta-sigma modulator is a signal-conversion building block that noise-shapes quantization error away from the measurement band. The CS5372 belongs to the broader delta-sigma modulator family within data-conversion ICs, with the CS5376 digital filter forming the companion conversion stage in the manufacturer-described measurement system. This separation allows the analog front end and digital filtering to be optimized independently. The CS5372-BS provides 24-bit resolution and a maximum serial conversion rate of 512 kS/s across two channels. Its fourth-order architecture is intended for high-dynamic-range acquisition, while the low-power design supports extended measurement-system run times. The serial interface simplifies connection to digital filter and processing hardware, and the 24-pin SSOP package supports compact, surface-mounted instrumentation. The device is intended to be used with the Cirrus Logic CS5376 digital filter to create a complete high-resolution analog-to-digital measurement system. This architecture is particularly relevant when sensor outputs require narrow-band extraction, strong rejection of out-of-band noise, and high resolution without requiring a conventional high-speed flash converter directly at the analog input. Typical applications include geophysical survey instruments, sonar measurement front ends, seismic data-acquisition systems, precision industrial monitoring, and low-frequency sensor instrumentation. In these systems, the CS5372-BS can convert differential or single-ended analog sensor signals into a high-resolution digital bitstream for subsequent filtering and processing. Designers should follow the manufacturer pin-description and application tables when assigning analog inputs, references, clocking, and digital interfaces. Decoupling, grounding, and clock implementation directly affect modulator performance, so the recommended layout and component values should be taken directly from the manufacturer datasheet and its CS5376 companion-filter recommendations. This page combines the CS5372-BS identification, application guidance, design considerations, comparison structure, and verified document links to support engineering selection. Use the Request a Quote form for current commercial availability, lead time, and sourcing support.

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CS5394-KS - 24-Bit Stereo Audio ADC | Cirrus Logic
CS5394-KS

CS5394-KS - 24-Bit Stereo Audio ADC | Cirrus Logic

Cirrus Logic CS5394-KS is a stereo audio analog-to-digital converter with 24-bit resolution, a nominal 48 kHz sampling rate, and a maximum output sample rate of 50 kHz per channel. The device performs sampling, analog-to-digital conversion, and anti-alias filtering for left and right audio inputs, then delivers the converted channels in serial form. Its manufacturer-rated signal-to-noise performance reaches 117 dB, and the converter operates from a 5 V supply in the identified ordering. An audio ADC is a data-conversion IC that converts continuous analog voltage signals into digital codes for processing, storage, or transmission. Within the semiconductor hierarchy, the CS5394-KS is a delta-sigma audio ADC, a specialized form of analog-to-digital converter optimized for stereo audio. The converter integrates sampling, conversion, and anti-alias filtering so the surrounding audio system can process left- and right-channel data without relying on a separate front-end filtering stage for those functions. The principal feature of the CS5394-KS is its 24-bit output resolution for both audio channels. The manufacturer rates the converter at 117 dB signal-to-noise ratio and identifies a 48 kHz operating mode, while the family documentation states that the output sample rate can reach 50 kHz per channel. These figures position the part for professional and consumer audio equipment requiring substantially more conversion resolution than conventional 16-bit audio converters provide. Serial output reduces the number of interchannel data conductors required by the system. As a delta-sigma converter, the CS5394-KS uses a noise-shaping architecture intended to move quantization noise away from the audio signal band. Its integrated anti-alias filtering complements the conversion stage by attenuating high-frequency content that could otherwise alias into the digital output. The result is a consolidated stereo conversion path in which analog inputs are sampled, filtered, converted into 24-bit values, and presented serially. Clocking, digital-interface implementation, and decoupling remain board-level responsibilities that should follow the manufacturer application guidance. Typical uses include professional audio interfaces, digital mixers, multichannel sound consoles, studio recording equipment, consumer stereo audio systems, and digital audio processing platforms. In these systems, the converter can capture balanced or unbalanced analog line-level signals after suitable input conditioning, then pass serial stereo data to a digital signal processor, audio codec, transmitter, or storage controller. The 117 dB signal-to-noise rating and 24-bit conversion depth are particularly relevant to equipment in which low-level audio content must be captured with low quantization noise. A critical board-design consideration is preserving the quality of the analog input path. Keep input routing short, maintain a continuous ground reference, place the required bypass capacitors close to their associated supply pins, and route digital clock and data lines away from sensitive analog inputs. Follow the manufacturer’s recommended clocking and interface layout because timing and grounding errors can degrade converter performance even when nominal resolution and sampling-rate specifications are satisfied. This product page consolidates the confirmed CS5394-KS conversion specifications, orderable naming information, practical application guidance, and verified source links. It also separates the documented device identity from unconfirmed package, pinout, environmental, and lifecycle details so engineers can make board-level decisions using manufacturer documentation rather than assumptions.

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CS5451-BS - 16-Bit 6-Channel Sigma-Delta ADC | Cirrus Logic
CS5451-BS

CS5451-BS - 16-Bit 6-Channel Sigma-Delta ADC | Cirrus Logic

The Cirrus Logic CS5451-BS is a 16-bit, six-channel sigma-delta analog-to-digital converter designed for power measurement applications. It operates from a 2.7 V to 3.5 V supply, supports an operating temperature range of -40 °C to +85 °C, and is packaged in a 28-pin SSOP. The device combines six sigma-delta conversion channels with digital decimation filtering and a serial interface for transferring measurement data to a host processor. An analog-to-digital converter, or ADC, converts continuously varying analog voltages into digital values that a microcontroller, DSP, or other digital controller can process. The CS5451 belongs to the sigma-delta ADC family, where oversampling and digital filtering are used to obtain high resolution in narrowband or low-frequency measurement systems. Within the component hierarchy, the CS5451 is a multichannel data-conversion IC and part of the broader ADC/DAC and power-management signal-chain ecosystem. The CS5451-BS provides six analog input channels and 16-bit resolution in a single package. This integration reduces the number of separate converters required in systems that monitor several power-related signals. Its sigma-delta architecture is particularly useful when the measured signals are relatively slow-changing and require strong rejection of out-of-band noise. The integrated decimation filters help limit the bandwidth presented to the digital interface. The 28-pin SSOP package supports compact circuit layouts in industrial control, metering, instrumentation, and embedded measurement systems. Because the converter is intended for the power measurement industry, its architecture prioritizes multichannel conversion and digital filtering rather than high-speed waveform capture. The 2.7 V to 3.5 V operating range places it in low-voltage digital and mixed-signal systems, where the host processor and supporting circuits commonly operate from a 3.3 V rail. Designers should treat the analog inputs, reference circuitry, serial interface, and power connections as separate layout concerns. Place decoupling capacitors close to the supply pins, route analog signals away from switching nodes, and use a clean ground return for the converter. The selected input bandwidth, decimation setting, output data rate, and digital filter configuration should be evaluated together because changing any of them affects the effective measurement bandwidth and conversion timing. This product page organizes the CS5451-BS electrical identity, package information, sourcing paths, comparison fields, and application guidance into one engineering reference. It also distinguishes verified drop-in alternatives from parts with different packages or insufficient compatibility information, helping designers avoid replacements that require PCB changes or interface redesign.

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CS5460-BS - 24-Bit Power/Energy ADC | Cirrus Logic
CS5460-BS

CS5460-BS - 24-Bit Power/Energy ADC | Cirrus Logic

Cirrus Logic Inc. CS5460-BS is a 24-bit single-input sigma-delta analog-to-digital converter designed for single-phase bi-directional power and energy measurement. It combines two delta-sigma ADCs, high-speed power-calculation functions, and a serial interface in a 24-SSOP package. Its measurement architecture supports energy, instantaneous I×V power, IRMS, VRMS, and energy-to-pulse-rate conversion for utility metering and energy-management equipment. A sigma-delta ADC is a voltage-to-digital converter category that uses continuous-time oversampling and digital filtering to obtain high resolution from relatively low-precision internal converters. Within the broader hierarchy of data-converter ICs, ADC and DAC devices convert analog signals for digital processing, while the CS5460-BS adds specialized arithmetic for real power and energy measurements instead of serving only as a general-purpose waveform converter. The key characteristics begin with a 24-bit conversion resolution, one analog input, and a sigma-delta architecture optimized for metering signals. The manufacturer datasheet also identifies an energy-data linearity specification of 0.1% of reading over a 1000:1 dynamic range. On-chip calculations provide energy, I×V, IRMS, VRMS, and energy-to-pulse-rate functions, reducing the amount of external signal processing required in a typical single-phase metering channel. The CS5460 architecture is intended to support accurate single-phase, two-wire or three-wire power-metering systems. Its serial interface allows calculated measurements and status information to be transferred to a host controller, while the integrated calculation functions allow voltage and current samples to be converted into useful power quantities close to the analog input stage. This integration can simplify board partitioning and help maintain consistent measurement scaling across voltage and current channels. Typical uses include residential electricity meters, utility revenue meters, industrial energy monitors, smart-grid endpoint equipment, and compact power-measurement modules. The device is also suited to systems that need accumulated energy as a pulse output rather than only a serial data stream. Its bi-directional measurement capability is valuable for installations where power flow can reverse, such as distributed generation or energy-storage monitoring. The main design consideration is analog signal conditioning. Current-sensor outputs and voltage-divider signals must remain within the device's specified input range, while filtering and component selection must preserve the metering accuracy required by the end product. Follow the application circuit and component recommendations in the manufacturer datasheet, and evaluate line-voltage safety requirements independently of the integrated measurement functions. This product page consolidates the CS5460-BS functional description, packaging information, application guidance, comparison fields, and verified substitution research. It also separates directly documented performance claims from parameters requiring an engineering review, helping designers establish the right measurement architecture before committing the 24-SSOP footprint to a PCB.

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CS5471-BS - Dual 16-Bit Delta-Sigma ADC | Cirrus Logic
CS5471-BS

CS5471-BS - Dual 16-Bit Delta-Sigma ADC | Cirrus Logic

Cirrus Logic CS5471-BS is a dual-channel, 16-bit delta-sigma analog-to-digital converter designed for power measurement applications. The device combines two delta-sigma ADCs, decimation filters, and a serial interface on one integrated circuit. It operates from a 2.7 V to 3.5 V supply and is available in a 20-pin SSOP package. A delta-sigma ADC is a voltage-regulating ADC architecture that uses a modulator and digital decimation filtering to convert an analog input into a high-resolution digital result. The CS5471-BS is part of the broader analog-to-digital converter hierarchy, where it combines precision conversion, input filtering, and serial data transfer within a dedicated data-acquisition IC. The principal specifications include 16-bit resolution, two analog input channels, 2.7 V to 3.5 V operation, delta-sigma conversion, and a 20-SSOP package. Its dual-channel structure supports simultaneous measurement of two related signals, while the integrated decimation filters reduce the digital sampling rate to a rate suitable for power-measurement instrumentation. The serial interface provides a compact connection between the converter and a host controller. Typical applications include single-phase and multi-channel energy meters, industrial power monitors, load monitoring systems, smart-grid sensing equipment, and laboratory measurement instruments. The device is particularly suited to systems that require accurate digitization of slowly changing or multiplexed analog signals rather than high-frequency waveform capture. When designing around the CS5471-BS, follow the manufacturer pin-description and application-circuit tables when assigning signals and decoupling components. Keep analog inputs and the serial interface layout consistent with the recommended reference configuration, and account for the supply range of 2.7 V to 3.5 V when designing the surrounding power tree. This page combines the device identity, package information, functional description, application context, sourcing guidance, and engineering notes for engineers evaluating the CS5471-BS. Use the manufacturer datasheet for the authoritative pin functions, timing limits, electrical characteristics, and recommended operating circuit.

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CS5503-BP - 20-Bit 4 kSps ADC | Cirrus Logic | Sensor Measurement
CS5503-BP

CS5503-BP - 20-Bit 4 kSps ADC | Cirrus Logic | Sensor Measurement

Cirrus Logic CS5503-BP is a 20-bit CMOS analog-to-digital converter designed for low-frequency sensor and measurement signals, with conversion rates up to 4 kSps and on-chip filtering. The device uses a charge-balance conversion technique and incorporates a 6-pole low-pass Gaussian filter. It is supplied in a PDIP-20 package and supports on-chip self-calibration for reducing offset and full-scale errors. An ADC is a data-acquisition IC that converts an analog input voltage into a numeric value for processing by a microcontroller, DSP, or other digital controller. The CS5503 belongs to the CMOS ADC hierarchy, where resolution describes the number of digital bits in each conversion result and conversion rate defines how rapidly those results are produced. The CS5503 emphasizes high resolution and moderate speed rather than high-bandwidth waveform acquisition. Principal features include 20-bit resolution, operation at up to 4 kSps word rate, charge-balance conversion, a 6-pole Gaussian low-pass filter, and on-chip self-calibration circuitry. These characteristics make the converter suitable for slow but precise measurements where physical, chemical, biological, or industrial sensor outputs must be digitized. The integrated filter reduces unwanted high-frequency content before the conversion result is transferred to the digital side. The charge-balance architecture supports accurate conversion of low-frequency signals, while the digital output can be selected according to the system clock and application requirements. On-chip self-calibration can be initiated at different times or temperatures to help maintain offset and full-scale accuracy. The available datasheet material describes typical calibration errors of less than one-half LSB for the relevant converter family, although application-specific limits should be confirmed against the complete operating conditions. Typical uses include temperature and pressure sensor acquisition, industrial process monitoring, laboratory instrumentation, and low-speed chemical or biological measurement systems. The CS5503 is most appropriate when 20-bit numeric resolution, on-chip filtering, and conversion rates up to 4 kSps are sufficient, but the input bandwidth is not the primary constraint. Designers should provide a suitable external clock or crystal, observe the required bypass and grounding practices, and allow adequate settling time for analog and digital supply rails. Because the verified source does not publish complete supply-voltage, reference-voltage, current-consumption, or operating-temperature tables, those values must be verified in the manufacturer datasheet before schematic release. This product page combines verified converter specifications, practical application guidance, source-backed availability information, and package information that helps engineers determine whether the CS5503-BP fits a precision, low-frequency measurement design before committing to a PCB layout.

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CS5503-BS - 20-Bit 4 kSPS Sigma-Delta ADC | Cirrus Logic
CS5503-BS

CS5503-BS - 20-Bit 4 kSPS Sigma-Delta ADC | Cirrus Logic

Cirrus Logic CS5503-BS is a CMOS, 20-bit, single-input sigma-delta analog-to-digital converter designed for low-frequency measurement signals, with conversion rates up to 4 kSPS in a 20-pin SOIC package. The converter uses a charge-balance architecture and non-aliasing conversion technique to support precision acquisition of physical, chemical, and biological process variables. An ADC, or analog-to-digital converter, is a mixed-signal semiconductor that transforms continuously varying analog voltages into numerical values. Sigma-delta ADCs belong to the data-acquisition IC hierarchy and use oversampling plus digital filtering to obtain high resolution at relatively low sample rates. The CS5503 is the 20-bit member of the CS5501 and CS5503 measurement-converter family. The principal verified characteristics include 20-bit resolution, one analog input, up to 4 kSPS word rates, a 20-pin SOIC package, and a charge-balance conversion architecture. Production testing is performed at 4.096 MHz, while the device is guaranteed by characterization to operate with a 200 kHz system clock. These details position it for slow sensor signals rather than high-bandwidth waveform acquisition. The non-aliasing architecture is particularly useful when slow measurements contain significant periodic interference, such as 50 Hz or 60 Hz mains hum. By shifting conversion aliases away from the selected output data rate, the CS5503-BS can help preserve the represented process signal without requiring the wide analog bandwidth associated with a high-speed flash or successive-approximation ADC. Digital output is represented by a 20-bit measurement word, while serial interface timing controls acquisition and transfer. Typical applications include bridge-based pressure and load measurement, temperature acquisition from resistive sensors, industrial process monitoring, chemical sensor instrumentation, and low-speed biomedical signal conditioning. The converter is best suited to systems where the measured quantity changes slowly and where high resolution is more valuable than high throughput. Its single-input architecture also keeps the signal chain compact when one transducer must be measured per converter. Designers should account for the analog front end, reference voltage, digital interface, grounding, and clock requirements when allocating the PCB area. The input network must protect the ADC from overvoltage and excessive source impedance, while the reference and supply rails must remain within their specified operating conditions. Because detailed pin names, electrical limits, and capacitor values were not included in the supplied verified excerpts, those implementation values should be confirmed directly against the manufacturer datasheet. This product record combines verified resolution, conversion-rate, package, architecture, and sourcing information with application-specific guidance. It also distinguishes same-family alternatives by resolution and packaging while making missing verified electrical details explicit, allowing engineers to assess fit without treating unavailable parameters as confirmed specifications.

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CS5505-ASZR - 16-Bit 4-Ch Sigma-Delta ADC | Cirrus Logic
CS5505-ASZR

CS5505-ASZR - 16-Bit 4-Ch Sigma-Delta ADC | Cirrus Logic

The Cirrus Logic CS5505-ASZR is a 16-bit, 4-channel, low-power CMOS Sigma-Delta analog-to-digital converter (ADC) in a 24-pin SSOP package, supplied on tape-and-reel. It offers a single converter core with four differential/quad single-ended input channels selected via an on-chip multiplexer, making it well-suited for low-frequency measurement of physical, chemical, and biological signals. What is a Sigma-Delta ADC? A Sigma-Delta (Σ-Δ) ADC is a converter architecture that oversamples the input signal and uses noise shaping to push quantization noise out of the baseband. The result is high resolution and excellent noise immunity at the cost of input bandwidth, which is why Σ-Δ converters like the CS5505-ASZR are categorized as data-acquisition ADCs sitting beneath the hierarchy of ADC → data converter → signal chain IC → semiconductor. They are the standard choice for precision sensor readout, weighing scales, strain gauges, thermistor bridges, and process-control loops where signals are sub-kHz and resolution dominates over speed. Key features of the CS5505-ASZR include 16-bit resolution, 4 input channels multiplexed to a single Σ-Δ core, low power consumption suitable for battery-powered instrumentation, on-chip digital filtering, and an SPI/serial-compatible interface. The -ASZ suffix denotes the 24-SSOP industrial temperature grade, and the -R suffix indicates tape-and-reel packaging, allowing direct compatibility with high-volume automated assembly. Architecturally, the CS5505 uses a switched-capacitor modulator followed by a digital decimation filter, enabling high effective resolution at low update rates. The 4-to-1 input mux allows the designer to rotate among four sensors using one converter, lowering BOM cost in multi-channel systems. Synchronization is handled by a dedicated calibration and control register set. Typical applications include industrial weighing scales, pressure transducers, temperature measurement systems with RTD or thermocouple front ends, and portable medical instruments such as glucose or blood-pressure monitors. Wherever a low-frequency, high-resolution, multi-channel readout is needed, the CS5505-ASZR provides a single-chip solution. When designing with this device, route analog and digital grounds as separate nets joined only at the ADC's AGND pin, and decouple AVDD and DVDD with 0.1 µF ceramic capacitors placed within 5 mm of the supply pins. This page synthesizes distributor pricing, drop-in alternatives from the same family, and practical design notes not found in the manufacturer datasheet alone.

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CS5506-BP - Low-Power 16/20-Bit ADC | Cirrus Logic
CS5506-BP

CS5506-BP - Low-Power 16/20-Bit ADC | Cirrus Logic

Cirrus Logic CS5506-BP is a very-low-power CMOS analog-to-digital converter designed for low-frequency measurement systems, with resolution options spanning 16-bit and 20-bit operation and a 32.768 kHz clocking arrangement described for the converter family. The device is intended for precision signal acquisition where low power consumption is more important than conversion speed. Its -BP ordering designation identifies the manufacturer's 20-pin TSSOP package, making the component suitable for compact, surface-mounted instrumentation. An analog-to-digital converter is an ADC, an interface IC that converts continuous analog voltage into a digital numerical representation. Within the broader semiconductor hierarchy, the CS5506-BP belongs to the ADC class, the data-converter category, the interface-IC group, and ultimately the integrated-circuit domain. This positioning is important in sensor instrumentation, where weak analog signals must be digitized without introducing excessive heat, system noise, or unnecessary power demand. The CS5506 family emphasizes very low power and measurement accuracy for low-frequency signals. Operation around a 32.768 kHz clock rate is relevant to designs that sample slowly changing physical quantities, including pressure, temperature, chemical concentration, and biological signals. The 16-bit and 20-bit resolution choices allow engineers to balance conversion precision against the signal-chain requirements of a particular instrument. Digital filtering and the integrated measurement architecture can reduce the demand for high-rate conversion in slow-response applications. Unlike a high-speed flash or successive-approximation ADC intended for communications or waveform capture, the CS5506-BP prioritizes low-frequency analog measurement and low power. This makes it most appropriate when the input changes slowly, the system is frequently battery powered, or thermal and standby power budgets are restrictive. Designers should account for the converter's specified clock, input range, reference arrangement, excitation requirements, and digital interface when constructing the surrounding analog circuitry. Typical uses include portable chemical analyzers, industrial process sensors, environmental monitors, biomedical instrumentation, laboratory measurement equipment, and low-rate energy or condition monitoring. The device is especially relevant when a 16-bit or 20-bit measurement path is required but the input does not justify a fast, power-hungry ADC. System clocking should remain synchronized with the converter's filtering and conversion timing to preserve valid measurement results. A critical design consideration is the distinction between nominal resolution and useful system accuracy. The converter's resolution does not remove errors introduced by the input amplifier, reference voltage, excitation source, grounding, or PCB leakage. Place analog input and reference connections away from digital switching paths, use a clean supply arrangement, and follow the pin-description and application circuits in the manufacturer datasheet when assigning tracks and bypassing networks. This product record combines the converter family's resolution, low-power role, clocking context, package information, sourcing workflow, and engineering-selection considerations. It also distinguishes verified same-family alternatives from unsupported cross-package substitutions, helping engineers determine whether a replacement preserves the 20-pin TSSOP footprint and the intended low-frequency measurement behavior.

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CS5507-ASZ - 16-Bit Low-Power Sigma-Delta ADC SOIC-20 | Cirrus Logic
CS5507-ASZ

CS5507-ASZ - 16-Bit Low-Power Sigma-Delta ADC SOIC-20 | Cirrus Logic

The Cirrus Logic CS5507-ASZ is a 16-bit, low-power, single-channel CMOS sigma-delta analog-to-digital converter (ADC) housed in a 20-pin SSOP (ASZ suffix) package. The CS5505/CS5506/CS5507/CS5508 family targets low-frequency measurement of physical, chemical, and biological signals in industrial, medical, and process-control instrumentation. According to the Cirrus Logic datasheet, the CS5507-ASZ provides 16-bit resolution (the family also includes 20-bit variants CS5505/CS5506 for higher precision), a differential input, and selectable external or internal voltage reference. An ADC (Analog-to-Digital Converter) is a data-acquisition integrated circuit that samples continuous analog signals and outputs discrete digital codes for downstream microcontrollers, DSPs, or processors. Sigma-delta (also written sigma-delta or delta-sigma) ADCs use oversampling and digital noise shaping to achieve high resolution and excellent noise immunity, making them well suited for precision DC and slow-moving signals rather than high-bandwidth audio. Within the data-converter hierarchy, the CS5507 belongs to the precision low-frequency measurement subcategory, positioned between general-purpose SAR ADCs and high-resolution audio ADCs. Key features of the CS5507-ASZ include a 4-channel multiplexer (MUX) front-end, an SPI-compatible serial data interface, differential input capability, very low power consumption suitable for battery-powered sensors, and an internal digital filter. The serial interface simplifies isolation and reduces pin count compared to parallel-output ADCs that require 16+ dedicated data lines. The device uses a switched-capacitor delta-sigma modulator followed by a digital low-pass filter, outputting 16-bit two's-complement codes over SPI. Power is typically derived from a single +5V analog supply, with separate analog and digital ground domains to maximize noise rejection in mixed-signal layouts. Typical applications include industrial weigh scales and load-cell amplifiers, temperature and pressure transducer digitizers, process-control 4-20 mA loop readbacks, battery-powered medical telemetry, and portable gas/chemical sensor instrumentation. The combination of low power and 16-bit precision suits remote, maintenance-free sensor nodes where the ADC must run for years on primary cells. When designing with the CS5507-ASZ, place the external reference decoupling capacitor as close to the REF pin as possible and keep digital return currents off the analog ground plane to avoid conversion-noise coupling. Use the SPI clock not exceeding the datasheet-specified maximum to ensure the digital filter settles correctly within the conversion window. This page synthesizes distributor pricing, same-family CS55xx drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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CS5507-ASZR - 16-Bit Sigma-Delta ADC, 20-SOIC | Cirrus Logic
CS5507-ASZR

CS5507-ASZR - 16-Bit Sigma-Delta ADC, 20-SOIC | Cirrus Logic

The Cirrus Logic CS5507-ASZR is a 16-bit, low-power, single-channel sigma-delta analog-to-digital converter (ADC) housed in a 20-pin SOIC wide-body package, supplied on tape and reel. According to verified distributor listings, the device integrates one differential input channel, an on-chip digital filter, and supports both internal and external voltage reference connection options. It is part of the CS5505/CS5506/CS5507/CS5508 ADC family, designed for measuring low-frequency signals in process-control, instrumentation, and sensor-interface applications. A sigma-delta ADC is a class of oversampling converter that trades raw speed for very high resolution by pushing quantisation noise out of the baseband with a modulator and a digital decimation filter. In this hierarchy, the CS5507 sits below general-purpose successive-approximation (SAR) ADCs in speed but above them in effective resolution at low input frequencies, making it a member of the precision low-frequency data-acquisition category of mixed-signal integrated circuits. Key features include 16-bit (no missing codes) resolution, single +5V analog supply operation, low power consumption suitable for battery-powered measurement systems, and a serial output interface that simplifies galvanic isolation and PCB routing. The differential input stage allows direct connection to bridge sensors such as load cells and strain gauges without additional instrumentation amplifiers in many cases. Typical applications include weigh scales, industrial pressure transducers, temperature-bridge digitisation using RTDs or thermocouple front-ends, and portable medical or environmental monitoring instruments. The wide-body 20-SOIC package aids hand prototyping and inspection while still supporting automated assembly. When designing with the CS5507-ASZR, place the external reference bypass capacitor as close to the REFIN+/REFIN- pins as practical and keep digital and analog grounds separated under a single tie-point to preserve CMRR. The complete ordering suffix -ASZR indicates 20-SOIC package, commercial temperature grade, and tape-and-reel packaging.

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CS5509-AP - 16-Bit 2-Input Sigma-Delta ADC | Cirrus Logic
CS5509-AP

CS5509-AP - 16-Bit 2-Input Sigma-Delta ADC | Cirrus Logic

Cirrus Logic CS5509-AP is a single-supply, 16-bit analog-to-digital converter with two analog inputs and a one-channel sigma-delta architecture, housed in a 16-pin PDIP package. It is intended for precision measurement systems that convert low-bandwidth, differential or single-ended sensor signals into high-resolution digital data. An ADC is an interface IC that samples an analog voltage and converts it into a numeric value for processing, measurement, or control. A sigma-delta ADC belongs to the class of mixed-signal converters that use continuous-time oversampling and digital filtering to achieve fine resolution. The CS5509-AP combines that conversion technique with a single-supply architecture, allowing it to operate from one supply rail in compact industrial, instrumentation, and embedded measurement equipment. The manufacturer identifies the device as a 16-bit converter with two analog inputs and a sigma-delta conversion system. Its dual-input arrangement allows a board to measure more than one analog quantity or use differential measurement when the circuit configuration requires it. Single-supply operation can also simplify signal-chain design by reducing the number of rails needed around the converter, although the supported supply range and input limits must be confirmed in the manufacturer datasheet before final component selection. The sigma-delta architecture is particularly useful when high nominal resolution and narrow-band measurement accuracy matter more than very high conversion speed. Such converters commonly use an external or internal reference, an analog input stage, a modulator, a digital decimation filter, and a serial interface. Exact filter characteristics, output rates, digital interface modes, and calibration behavior for the CS5509-AP should be taken directly from the applicable Cirrus Logic datasheet. Typical uses include industrial process monitoring, low-level sensor acquisition, laboratory instrumentation, and embedded measurement modules. In these systems, the CS5509-AP serves as the bridge between an analog sensor front end and a microcontroller or other digital controller. Designers should pay particular attention to the reference voltage, input common-mode range, analog input filtering, grounding, and the acquisition timing associated with the selected output data rate. For layout, keep the analog input and reference paths short, use a clean low-noise supply, and follow the manufacturer guidance for bypassing and grounding. Because the package is a through-hole PDIP rather than a fine-pitch surface-mount option, it is especially practical for prototypes, educational designs, and moderate-volume industrial assemblies where insertion or socketed assembly is acceptable. This page consolidates the confirmed device identity, package, converter type, sourcing links, technical design guidance, and application-selection context into one engineering-oriented resource for evaluating the CS5509-AP.

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CS5511-AS - 16-Bit Delta-Sigma ADC | Cirrus Logic
CS5511-AS

CS5511-AS - 16-Bit Delta-Sigma ADC | Cirrus Logic

The Cirrus Logic CS5511-AS is a 16-bit delta-sigma analog-to-digital converter with an internal oscillator, optimized for precision signal acquisition in an 8-pin SOIC package. It belongs to the CS5510/CS5511/CS5512/CS5513 converter family, whose charge-balance architecture provides 16-bit performance for CS5510 and CS5511 devices. The family is intended for industrial measurement systems including weigh scales, process-control equipment, and sensor-interface circuits. A delta-sigma ADC is a voltage regulator for digital measurement: it oversamples an analog input and uses digital filtering and charge balancing to convert that voltage into a high-resolution numerical result. Within the broader hierarchy, a delta-sigma ADC is a data-converter IC, a form of ADC/DAC, and ultimately part of a signal-chain semiconductor system. This approach prioritizes resolution, noise rejection, and integration when very high conversion rates are unnecessary. The CS5511-AS provides 16-bit nominal resolution, differential analog inputs, and an integrated oscillator. Published family information identifies linearity error as 0.0015% of full scale and noise-free resolution up to 17 bits. The internal oscillator removes the need for an external clock source, reducing component count and making the converter suitable for standalone measurement instruments. Its 8-pin SOIC format supports compact, surface-mount PCB designs. The CS5510, CS5511, CS5512, and CS5513 devices use charge-balance techniques, but they occupy different performance positions within the family. The CS5510 and CS5511 are specified for 16-bit performance, while the CS5512 and CS5513 target 20-bit performance. Because resolution, offset, gain, filtering, and interface requirements affect the complete measurement chain, the converter should be selected according to the required accuracy rather than package size alone. Typical uses include digital weighing systems, process-control transmitters, pressure and temperature instrumentation, industrial sensor interfaces, and low-speed data-acquisition panels. In these applications, the internal clock and integrated converter reduce external circuitry, while the differential input architecture can help reject common-mode interference when implemented with suitable source circuitry. For a robust implementation, verify the analog input range, differential-versus-single-ended configuration, digital interface format, reference voltage, and filtering requirements in the manufacturer datasheet before finalizing the PCB. Allow space for all eight pins, connect the supply and ground pins according to the recommended layout, and evaluate input settling time before using the converter for multiplexed channels. This page organizes the CS5511-AS family specifications, practical application guidance, package information, sourcing options, and compatible family alternatives into one engineering-focused reference. It also highlights the decisions that matter when moving between 16-bit and 20-bit members of the same converter family.

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CS5513-BS - 20-Bit Sigma-Delta ADC | Cirrus Logic
CS5513-BS

CS5513-BS - 20-Bit Sigma-Delta ADC | Cirrus Logic

The Cirrus Logic CS5513-BS is a 20-bit, single-channel sigma-delta analog-to-digital converter in an 8-pin SOIC package. It uses charge-balance conversion technology, includes an on-chip oscillator according to the manufacturer product page, and is designed for cost-conscious systems that require accurate signal conversion without an external clock source. The converter is part of the discontinued CS5510, CS5511, CS5512, and CS5513 family and is intended for legacy, industrial, instrumentation, and embedded applications. A sigma-delta ADC is an analog-to-digital converter category that uses oversampling, noise shaping, and digital filtering to convert an analog input into a high-resolution digital result. Its wider internal conversion bandwidth and digital filter make it especially useful for low-bandwidth measurements where the input signal can be filtered effectively. The CS5513 family uses charge-balance techniques to provide 16-bit performance in CS5510 and CS5511 and 20-bit performance in CS5512 and CS5513. The CS5513-BS combines a 20-bit conversion resolution, a single analog input, one sigma-delta conversion channel, and an integrated oscillator in a compact 8-pin SOIC. Its on-chip oscillator removes the need for an external clock source, reducing component count and simplifying clock implementation. The manufacturer identifies low power, flexible supply, compact pinout, and ease of use as important benefits for space-constrained and cost-sensitive designs. Internally, the converter architecture oversamples the analog input and shapes quantization noise toward higher frequencies. A subsequent digital filter removes this shaped noise from the signal bandwidth of interest. This approach is well suited to precision measurement of relatively slow signals because it can provide high effective resolution without the complex external clock and sampling systems required by many high-speed converter architectures. Exact conversion-rate, filter, reference-voltage, and noise specifications should be confirmed in the manufacturer datasheet. Typical uses include industrial process monitoring, sensor interface measurement, laboratory instrumentation, panel meters, data acquisition, and embedded control systems. The single-channel structure is particularly appropriate when one analog quantity must be digitized in a compact design. Because the CS5513-BS includes an oscillator, it can also simplify isolated or distributed measurement nodes where supplying a clean external reference clock would be inconvenient. Designers should pay close attention to the analog input range, external reference requirements, digital interface timing, and the internal digital filter response before fixing the PCB layout. Place input, reference, and decoupling connections according to the datasheet's recommended application diagram. Account for the filter settling time when reading successive conversions, and verify that the source impedance and acquisition network do not distort the sampled signal. This product page combines the manufacturer family information with distributor and datasheet references, pin-compatibility information for the CS5513-BSZ ordering variant, and practical guidance for evaluating this obsolete converter in new and legacy designs. Because the family is discontinued, engineers should also assess whether an active replacement is required before committing to a new production design.

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CS5520-BSZ - 20-bit Bridge Transducer Sigma-Delta ADC | Cirrus Logic
CS5520-BSZ

CS5520-BSZ - 20-bit Bridge Transducer Sigma-Delta ADC | Cirrus Logic

The Cirrus Logic CS5520-BSZ is a 20-bit, single-channel, sigma-delta analog-to-digital converter purpose-built for digitizing low-level signals from strain gauges, load cells, and pressure transducers. Housed in a 24-pin SOIC package, the CS5520-BSZ integrates a software-programmable instrumentation amplifier, on-chip digital calibration, and a synchronous SPI-compatible serial interface, achieving 20-bit resolution at output word rates up to 60 samples per second. It operates from a single +5 V analog supply plus a +3 V to +5 V digital supply, drawing a quiescent current of approximately 6.7 mA. A sigma-delta (Σ-Δ) ADC is a converter that oversamples an input signal at a much higher rate than the Nyquist frequency and uses noise-shaping feedback to push quantization noise out of the signal band. In the bridge-sensor hierarchy, the CS5520-BSZ belongs to the precision transducer ADC class, which sits between general-purpose ADCs and dedicated strain-gauge signal conditioners, sharing the role of power management ICs and amplifiers in the broader mixed-signal IC family. By integrating excitation-current sources and instrumentation gain on-chip, the CS5520-BSZ replaces what would otherwise be a multi-chip front-end (sensor + INA + 24-bit ADC + MCU interface logic). Key differentiating features include four software-selectable differential analog input ranges (±25 mV, ±55 mV, ±100 mV, and ±250 mV referenced to the on-chip common-mode voltage), a programmable-gain instrumentation amplifier with gains of 1, 2, 4, 8, 16, 32, 64, and 128, an integrated constant-voltage or constant-current bridge excitation block, and a low-noise chopper-stabilized front-end with digital filter options (sinc³ or sinc¹). The CS5520 also supports DC or AC bridge excitation, allowing ratiometric measurement configurations that cancel 1/f noise and lead/drift over the bridge line. Architecturally, the device uses a second-order sigma-delta modulator whose bit-stream is decimated by an on-chip digital filter, with calibration coefficients stored in on-chip registers to correct gain and offset drift. According to the manufacturer datasheet, the part achieves ±0.0007 %FS nonlinearity (INL) and 20-bit effective resolution at the 60 Sps output word rate, with a noise floor below 1 µVrms at the lowest output rate. The hardware interface is a four-wire synchronous serial port (SCLK, SDO, SDI, CS) reading conversion data after an end-of-conversion flag. Typical applications include weigh scales, force and load-cell instrumentation, process-control pressure transmitters, industrial weighing platforms, and torque/stress measurement systems. The wide input range and high common-mode rejection also make it suitable for battery-cell voltage and strain-bridge temperature compensation in-line monitoring. When designing with this device, ensure that the analog and digital grounds are joined at a single star point and that the bridge excitation traces are routed away from the digital SPI lines to preserve CMRR. Calibration should be performed at the same output word rate as the measurement to avoid scale-shift errors. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, giving engineers a single consolidated reference for the CS5520-BSZ.

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CS5521-AP - 16-Bit Sigma-Delta ADC | Cirrus Logic
CS5521-AP

CS5521-AP - 16-Bit Sigma-Delta ADC | Cirrus Logic

Cirrus Logic CS5521-AP is a 16-bit sigma-delta analog-to-digital converter with two conversion channels and four analog inputs, packaged in a 20-pin PDIP. The converter combines a charge-balance delta-sigma architecture with a low-input-current, chopper-stabilized programmable-gain instrumentation amplifier, making it suitable for precision sensor measurement rather than high-speed waveform acquisition. An analog-to-digital converter, or ADC, converts continuous analog voltage into a digital representation for processing, storage, or control. The sigma-delta ADC belongs to the delta-sigma converter family, a subcategory of data-converter and signal-processing integrated circuits. Its architecture favors high resolution and noise performance over conversion speed, which makes it especially effective for slowly changing signals from resistive bridges, thermocouples, pressure sensors, and other low-bandwidth instrumentation sources. The CS5521 family is identified by 16-bit resolution for the CS5521 and CS5523 devices, compared with 24-bit resolution in the related CS5522, CS5524, and CS5528 devices. The CS5521 provides a two-channel configuration, while the family supports two-, four-, and eight-channel variants. Its integrated low-input-current and chopper-stabilized instrumentation amplifier simplifies front-end design by reducing the need for separate low-noise amplification stages. The charge-balance conversion technique supports precise measurement of low-level analog signals and enables digital filtering to suppress out-of-band noise. Digital filtering also increases the effective time required for a converted result to settle. Designers should therefore distinguish between sample rate, output-data rate, digital-filter settling time, and the rate at which each input can be updated. The 20-pin PDIP package is suited to through-hole industrial and instrumentation assemblies where a larger package and easy inspection are acceptable. Typical uses include weighing systems, process-control transmitters, temperature measurement, pressure sensing, bridge-based transducers, laboratory measurement equipment, and multichannel industrial monitoring. In these systems, the ADC converts the differential output of a sensor or resistive bridge into a digital code while its instrumentation amplifier provides programmable gain close to the sensor. Primary design considerations include choosing compatible input and reference voltages, observing the required filter settling time, and protecting analog inputs from transients. The reference voltage and analog front-end design directly influence accuracy, while bypassing and grounding determine whether the converter reaches its intended noise performance. This product page combines the manufacturer's family description with verified package, resolution, channel-count, and cross-reference information, then adds application guidance and engineering considerations that help distinguish the CS5521 from related Cirrus Logic converter options.

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CS5525-ASZR - 16-Bit Multi-Range Sigma-Delta ADC | Cirrus Logic
CS5525-ASZR

CS5525-ASZR - 16-Bit Multi-Range Sigma-Delta ADC | Cirrus Logic

The Cirrus Logic CS5525-ASZR is a 16-bit, multi-range, low-noise, low-power sigma-delta analog-to-digital converter (ADC) with a serial (SPI-compatible) interface, housed in a 20-pin SSOP package. It integrates an instrumentation amplifier, a programmable-gain amplifier (PGA), eight digital filter selections, and self-calibration plus system-calibration circuitry, and operates from a single 3 V to 5 V analog supply with an output word rate of up to 3.76 Hz (typical, XIN = 32.768 kHz). A sigma-delta ADC (also written as Delta-Sigma, or Sigma-Delta, ADC) is a converter architecture that oversamples the analog input at many times the Nyquist rate and uses noise-shaping digital filtering to push quantization noise out of the signal band, achieving excellent linearity and effective resolution at low sample rates. Within the broader converter family, the CS5525 sits in the precision-slow-rate (DC-measurement) sub-category between 24-bit audio-grade converters and high-speed successive-approximation-register (SAR) ADCs; it is intended for high-accuracy, low-bandwidth sensor measurements rather than wideband signal acquisition. Key features include 16 effective bits of resolution, true bipolar input ranges (selectable from ±25 mV up to differential ±5 V on dedicated ranges), an input instrumentation-amp front end, a programmable PGA, on-chip 4-bit digital I/O port, and a 4-bit latch compatible with the original CS5505/CS5525 second-source pinout. According to the manufacturer datasheet the converter uses a charge-balanced switched-capacitor modulator followed by a user-selectable SINC filter, which is the architecture that delivers its low input-referred noise at low output word rates. The CS5525-ASZR targets weigh-scale load-cell digitization, thermocouple and RTD cold-junction or linearized readouts, industrial process-control instrumentation, and battery-powered portable instruments that require excellent DC accuracy, integrated gain stages, and self-calibration. Designers choose it where true bipolar inputs, ratiometric reference support, and per-range calibration matter more than bandwidth. When designing with the CS5525-ASZR pay close attention to the analog/digital supply decoupling (a separate quiet AVdd/DVdd pair is recommended), reference selection (a low-drift, low-noise external reference is required to realize the part's best noise and linearity numbers), and the XIN master-clock. This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not present in the manufacturer datasheet alone.

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CS5526-BSZR - 20-Bit Sigma-Delta Multi-Range ADC | Cirrus Logic
CS5526-BSZR

CS5526-BSZR - 20-Bit Sigma-Delta Multi-Range ADC | Cirrus Logic

The Cirrus Logic CS5526-BSZR is a 20-bit delta-sigma analog-to-digital converter (ADC) with multi-range input capability, integrated instrumentation amplifier, programmable gain amplifier (PGA), eight selectable digital filters, and self/system calibration circuitry. It is housed in a 20-pin SSOP package and operates over -40C to +85C. According to the manufacturer datasheet, the device targets precision data acquisition applications including weigh scales, process control, and temperature/pressure transducer readout, where its 20-bit resolution and on-chip calibration simplify signal-chain design. A delta-sigma (Delta-Sigma) ADC is a type of oversampling converter that uses high-frequency sampling and digital filtering to achieve high resolution at low bandwidth. The CS5526-BSZR uses this architecture to convert low-frequency analog signals (typically thermocouples, strain gauges, RTDs, and other sensors) into a serial digital output. Within the broader component taxonomy, it belongs to: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. Key features include 20-bit resolution (no missing codes), selectable input ranges (multi-range input voltage), a PGA providing gain settings of 1x, 2x, 4x, 8x, 16x, 32x, and 64x for low-level signal conditioning, and an integrated instrumentation front-end that simplifies direct bridge-sensor interfacing. The serial interface is SPI/QSPI/MICROWIRE-compatible. Eight digital filter selections allow trade-offs between output data rate and 50Hz/60Hz rejection, while on-chip calibration removes offset and gain errors at power-up or on demand. The CS5526-BSZR uses a charge-balancing architecture with a modulator and SINC-style digital decimation filter, achieving effective resolution through oversampling. The integrated chopper-stabilized instrumentation amplifier minimizes drift and 1/f noise. Power consumption is low (typical quiescent current in the few-mA range) for use in loop-powered or battery-backed industrial transmitters. Typical applications include weigh scales (load cell readout), process-control analog input modules, temperature measurement using thermocouples or RTDs, pressure transmitters, and medical instrumentation where a high-resolution serial-output ADC is required. The multi-range PGA allows a single device to handle 4-20mA current-loop voltage drops, 0-10V process signals, and microvolt-level sensor outputs. When designing with this device, ensure stable analog and digital supply decoupling (a 0.1uF ceramic plus a 10uF tantalum within 5mm of AVDP/DVDP pins), keep analog and digital grounds separated until joined at one star point near the IC, and program the calibration register at power-up to remove board-level offset. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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CS5528-AP - 24-Bit 8-Channel ADC with PGIA | Cirrus Logic
CS5528-AP

CS5528-AP - 24-Bit 8-Channel ADC with PGIA | Cirrus Logic

The Cirrus Logic CS5528-AP is a 24-bit, 8-channel buffered delta-sigma analog-to-digital converter with programmable-gain instrumentation amplifiers, supplied in a PDIP-24 package. The device combines eight-channel signal acquisition, programmable input gain, and high-resolution conversion in one integrated circuit. The manufacturer identifies the CS5528 as part of the CS5521, CS5522, CS5523, CS5524, and CS5528 family of multichannel converters. A delta-sigma ADC is an analog-to-digital converter that uses oversampling, digital filtering, and noise shaping to obtain high resolution from a relatively compact converter core. Within the power-management and signal-chain hierarchy, the CS5528-AP belongs to the ADC, data-acquisition IC, and analog signal-processing semiconductor categories. Its buffered delta-sigma architecture is intended for systems that require precise conversion of multiple low-bandwidth analog inputs rather than high-frequency waveform capture. The CS5528-AP provides 24-bit resolution across eight channels and integrates a programmable-gain instrumentation amplifier with each channel. The PGIA adds adjustable analog gain ahead of conversion, allowing input signals to be scaled into the converter's usable range. Additional family-level information identifies the converters as using charge-balance techniques, with the CS5522, CS5524, and CS5528 providing 24-bit performance and the CS5521 and CS5523 providing 16-bit performance. The buffered input stage is an important architectural feature because it provides impedance buffering ahead of the modulator and digital filtering stages. This can simplify matching across eight analog channels and reduce sensitivity to source impedance. The multirange architecture also permits different input ranges to be supported within one converter family, making the CS5528 suitable for systems that acquire several physical quantities with different signal amplitudes. Typical uses include industrial process monitoring, sensor-interface measurement, laboratory instrumentation, environmental monitoring, and multichannel data-acquisition systems. Eight integrated channels reduce the need for separate converter packages when the monitored inputs are slow-changing or low bandwidth. The same device family can also be considered in precision measurement systems where a 24-bit conversion result and selectable analog gain improve the usable dynamic range of the front end. PCB design should preserve the analog and digital separation described by the manufacturer datasheet. Keep analog input routing away from digital control and interface traces, use a stable analog supply, and follow the recommended grounding and decoupling arrangements. Because the exact electrical limits, reference requirements, acquisition timing, and pin assignments are not reproduced here, use the manufacturer pin-description and application information when finalizing component values and PCB constraints. This page consolidates the confirmed conversion architecture, channel count, package information, lifecycle position, and practical design considerations for engineers evaluating the CS5528-AP. It also distinguishes a genuine PCB drop-in replacement from merely similar ADC functions, helping designers avoid substitutions that require pin, footprint, or analog-performance requalification.

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CS5528-ASZR - 24-Bit 8-Ch Sigma-Delta ADC w/ PGIA | Cirrus Logic
CS5528-ASZR

CS5528-ASZR - 24-Bit 8-Ch Sigma-Delta ADC w/ PGIA | Cirrus Logic

The Cirrus Logic CS5528-ASZR is a 24-bit, 8-channel, single-conversion sigma-delta analog-to-digital converter with a built-in chopper-stabilized instrumentation amplifier and programmable gain amplifier (PGIA), housed in a 24-pin SSOP (5.30 mm body width) package. It accepts input spans of 25 mV, 55 mV, 100 mV, 1 V, 2.5 V, and 5 V, runs from a single 3 V to 5 V supply, and uses an external 32.768 kHz master clock for an output word rate of approximately 617 Hz. An instrumentation ADC such as the CS5528-ASZR is a precision data-conversion IC optimized for low-frequency, high-resolution measurement of small analog signals (e.g. strain gauges, RTDs, thermocouples, weigh scales). The category hierarchy is: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. The chopper-stabilized front end cancels offset and 1/f drift, while the charge-balance sigma-delta modulator plus digital filter deliver true 24-bit noise-free resolution for DC and slow-moving signals. Key features include on-chip calibration (self and system), per-channel PGA gain (1x to 32x nominal via input-span selection), differential bipolar inputs with 4-bit channel-ID tag, an integrated FIFO that decouples the host read rate from the conversion rate, and an SPI-compatible serial interface. A power-on reset and dedicated status registers simplify firmware bring-up, and the device supports both unipolar and true bipolar input ranges using a single positive supply. Typical applications include industrial weigh scales and load-cell digitizers, multi-channel temperature acquisition via thermocouple/RTD front ends, process-control analog input modules, and 6- or 8-zone environmental monitoring panels. The 24-bit ENOB at low word rates gives >20 bits of effective resolution, which is sufficient for ratiometric bridge measurement, while the eight channels let one IC replace multiple single-channel ADCs on a compact PCB. For best results, place a 1 nF to 10 nF film capacitor directly on the REFIN+/- pins and a 0.1 uF ceramic on VA/VD; route the analog and digital grounds separately and join them at a single star point beneath the IC. The PGIA gain should be chosen so the full-scale input span equals the largest expected sensor output to maximize dynamic range. This page synthesizes Cirrus Logic datasheet specifications, current distributor pricing, drop-in alternatives and practical design notes into one place for engineers evaluating the CS5528-ASZR for precision multi-channel measurement.

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CS5529-AP 16-Bit Delta-Sigma ADC | Cirrus Logic
CS5529-AP

CS5529-AP 16-Bit Delta-Sigma ADC | Cirrus Logic

Cirrus Logic CS5529-AP is a low-power, programmable 16-bit delta-sigma analog-to-digital converter with one analog input, selectable output rates, a 6-bit output latch, and a 3-wire serial interface. The device operates from 2.5 V to 5 V, supports a -40°C to +85°C temperature range, and is offered in a 20-pin SSOP package. A delta-sigma ADC is a high-resolution data-converter category that converts an analog voltage into a digital representation by using a fourth-order modulator and digital filtering. Within the broader semiconductor hierarchy, it belongs to the ADC family, then data-converter ICs, and ultimately the integrated-circuit category. This architecture is especially useful when high nominal resolution, programmable conversion behavior, and simple serial connectivity matter more than very high sampling rates. The CS5529 combines coarse and fine charge buffers with a fourth-order delta-sigma modulator. According to the Cirrus Logic datasheet, it includes a calibration microcontroller, eight selectable digital filters with programmable decimation rates, a 6-bit output latch, and a 3-wire serial interface. Programmable output rates allow the system designer to balance measurement throughput against signal bandwidth and filtering requirements. The converter supports single-conversion operation and is designed for low-power measurement systems. Its 1.88 Hz output-rate specification supports slow, high-resolution measurements where the sampled signal does not require rapid updates. The 16-bit conversion word and six-bit output latch provide a defined digital handoff to a microcontroller or other serial host, while the filtered delta-sigma architecture helps reduce the need for extensive external analog filtering. Typical applications include precision pressure and force measurement, low-frequency process instrumentation, temperature acquisition, industrial sensor interfaces, laboratory measurement equipment, and embedded systems that require a calibrated low-rate analog measurement. The one-input architecture is particularly suitable for single-channel sensing where the analog signal level is known and stable enough to benefit from controlled conversion timing. For PCB implementation, preserve the analog input path from the sensor to the converter, provide the decoupling and reference arrangements specified by the manufacturer, and route the three-wire serial interface away from high-current switching nodes. The 20-pin SSOP footprint requires careful assembly planning because its closely spaced leads are less forgiving of solder bridging than a leaded package. This page consolidates the converter architecture, operating limits, interface details, application guidance, and replacement assessment into a design-focused reference. It also distinguishes documented device characteristics from selection questions that require confirmation against the latest manufacturer datasheet before a new layout or production release.

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