CS5525-ASZR - 16-Bit Multi-Range Sigma-Delta ADC | Cirrus Logic
料号： CS5525-ASZR ⚠ 最后一次采购| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $11.92 | $11.92 |
| 10 | $10.73 | $107.30 |
| 100 | $9.54 | $954.00 |
| 500 | $8.59 | $4,295.00 |
| 1,000 | $7.66 | $7,660.00 |
CS5525-ASZR 概述
A sigma-delta ADC (also written as Delta-Sigma, or Sigma-Delta, ADC) is a converter architecture that oversamples the analog input at many times the Nyquist rate and uses noise-shaping digital filtering to push quantization noise out of the signal band, achieving excellent linearity and effective resolution at low sample rates. Within the broader converter family, the CS5525 sits in the precision-slow-rate (DC-measurement) sub-category between 24-bit audio-grade converters and high-speed successive-approximation-register (SAR) ADCs; it is intended for high-accuracy, low-bandwidth sensor measurements rather than wideband signal acquisition.
Key features include 16 effective bits of resolution, true bipolar input ranges (selectable from ±25 mV up to differential ±5 V on dedicated ranges), an input instrumentation-amp front end, a programmable PGA, on-chip 4-bit digital I/O port, and a 4-bit latch compatible with the original CS5505/CS5525 second-source pinout. According to the manufacturer datasheet the converter uses a charge-balanced switched-capacitor modulator followed by a user-selectable SINC filter, which is the architecture that delivers its low input-referred noise at low output word rates.
The CS5525-ASZR targets weigh-scale load-cell digitization, thermocouple and RTD cold-junction or linearized readouts, industrial process-control instrumentation, and battery-powered portable instruments that require excellent DC accuracy, integrated gain stages, and self-calibration. Designers choose it where true bipolar inputs, ratiometric reference support, and per-range calibration matter more than bandwidth.
When designing with the CS5525-ASZR pay close attention to the analog/digital supply decoupling (a separate quiet AVdd/DVdd pair is recommended), reference selection (a low-drift, low-noise external reference is required to realize the part's best noise and linearity numbers), and the XIN master-clock. This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not present in the manufacturer datasheet alone.
直接替换替代料： CS5525-ASZR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： CS5525-ASZR （相同外形与封装尺寸） ——差异在于 Number of Input Channels, Package, Resolution, Calibration, Interface.
快速对比工具——选择替代料号进行并排对比：
CS5525-ASZ
✅ 直接替换📋 参考替代料（不在目录中）
CS5526-ASZR
✅ 直接替换📋 参考替代料（不在目录中）
CS5526-ASZ
✅ 直接替换📋 参考替代料（不在目录中）
CS5532-ASZR
✅ 直接替换✓ 有现货
$8.65 / 个
查看数据手册 →CS5534-ASZ
✅ 直接替换✓ 有现货
$7.6 / 个
查看数据手册 →CS5525-ASZR 最大额定值与电气特性
| Part Number | CS5525-ASZR |
| Manufacturer | Cirrus Logic |
| 分类 | Analog-to-Digital Converter (ADC) |
| 分辨率 | 16 bits |
| Architecture | Multi-range Sigma-Delta (Delta-Sigma) |
| Number of Input Channels | 1 differential |
| Data Interface | Serial (SPI-compatible) |
| Output Word Rate (max) | 3.76 Hz (XIN = 32.768 kHz) |
| Analog Supply Voltage | 3 V to 5 V (single supply) |
| 输入电压范围 | Multi-range, true bipolar up to ±5 V differential (per datasheet) |
| 工作温度范围 | -40 C to +85 C |
| 封装 | 20-SSOP (5.30 mm body width) |
| 安装类型 | Surface Mount |
| Packaging | Tape & Reel (TR) |
| Input Features | Instrumentation amplifier + programmable PGA |
| Calibration | Self-calibration and system-calibration on-chip |
| Digital I/O | 8 digital filter selections; 4-bit digital I/O + 4-bit latch |
| RoHS 状态 | Compliant |
| Lifecycle | Discontinued by Cirrus Logic; last-time-buy (per Cirrus discontinued product listing) |
CS5525-ASZR 引脚配置
| 引脚 1 | AVDD — Analog supply (3 V to 5 V) |
| 引脚 2 | REF IN+ — Differential reference positive input |
| 引脚 3 | REF IN- — Differential reference negative input |
| 引脚 4 | AIN+ — Differential analog input positive |
| 引脚 5 | AIN- — Differential analog input negative |
| 引脚 6 | VBIAS — Internal bias voltage bypass |
| 引脚 7 | AGND — Analog ground |
| 引脚 8 | XIN — Master clock input (typical 32.768 kHz) |
| 引脚 9 | XOUT — Crystal driver output (unused for external clock) |
| 引脚 10 | DGND — Digital ground |
| 引脚 11 | DVDD — Digital supply (3 V to 5 V) |
| 引脚 12 | CSBAR — Active-low serial port chip-select |
| 引脚 13 | SCLK — Serial clock input |
| 引脚 14 | SDI — Serial data input (configuration write) |
| 引脚 15 | SDO — Serial data output (conversion read) |
| 引脚 16 | FS — Frame sync / synchronization for SDO |
| 引脚 17 | DIO0 / L0 — Digital I/O port bit 0 / latch bit 0 |
| 引脚 18 | DIO1 / L1 — Digital I/O port bit 1 / latch bit 1 |
| 引脚 19 | DIO2 / L2 — Digital I/O port bit 2 / latch bit 2 |
| 引脚 20 | DIO3 / L3 — Digital I/O port bit 3 / latch bit 3 |
典型应用
CS5525-ASZR 适用于 6 应用s: Weigh-Scale / Load-Cell Digitizer, Thermocouple Temperature Readout, RTD / Resistance Temperature Detector Bridge, Industrial Process-Control / 4-20 mA Loop Digitizer, Battery-Powered Portable Metering, Precision Sensor Conditioning Front End.
Weigh-Scale / Load-Cell Digitizer
The CS5525-ASZR drives a 4-wire strain-gauge bridge directly because its true bipolar +/-25 mV to differential +/-5 V input ranges match common load-cell full-scale outputs without external gain stages. The integrated instrumentation amplifier and programmable PGA eliminate the need for an external front-end op-amp, while on-chip self- and system-calibration remove offset and gain errors at every power-up, satisfying OIML/NTEP accuracy classes. Designers must use a low-drift external reference (e.g. 2.5 V) to realize the part's full 16-bit effective resolution at the 3.76 Hz output word rate.
推荐
Thermocouple Temperature Readout
The CS5525-ASZR digitizes the microvolt-level EMF of Type J/K/T/etc. thermocouples by combining its low-noise sigma-delta modulator with the on-chip PGA, which together deliver the noise-floor headroom needed for sub-1 C cold-junction-compensated measurements. The serial output and 8 selectable digital filters let the designer trade output word rate (3.76 Hz default, lower available) against effective resolution so that slow-responding thermocouple channels can reach maximum integration without switching parts. A separate isothermal-board reference, plus proper guarding of the analog/digital grounds, is required to avoid corrupting the CS5525's high effective number of bits.
推荐
RTD / Resistance Temperature Detector Bridge
When paired with a precision reference resistor the CS5525-ASZR digitizes PT100/PT1000 RTDs in a ratiometric measurement configuration that cancels both reference drift and PGA gain error. The serial SPI interface connects directly to a microcontroller, and the on-chip calibration routines remove offset and gain drift on the order of nanovolts per C. Designers should choose the 60 Hz or 50 Hz digital-filter first-notch frequency to reject mains-induced noise picked up by long RTD leads in industrial installations.
推荐
Industrial Process-Control / 4-20 mA Loop Digitizer
The CS5525-ASZR converts a 4-20 mA current-loop-derived voltage (across a sense resistor) into a 16-bit serial word, allowing programmable logic controllers and remote I/O modules to read analog process variables with single-digit microvolt resolution. The 3 V to 5 V supply range supports 24 V loop-powered field instrumentation when paired with a downstream switching regulator, and the bipolar inputs tolerate ground-potential differences between loops that would otherwise saturate a unipolar front end. A front-end protection TVS and a precision 250 ohm sense resistor complete the typical circuit per the CS5525/26 datasheet.
推荐
Battery-Powered Portable Metering
The CS5525-ASZR's single 3 V to 5 V supply and low power dissipation make it a strong choice for handheld DMMs, gas analyzers, and field-meter applications where battery life matters. Its programmable output word rate lets the meter power down between conversions while still extracting full 16-bit resolution - a critical advantage over higher-bandwidth SAR ADCs that force continuous sampling. The 4-bit digital I/O and 4-bit transparent latch allow direct drive of LCD segments or push-button flags without glue logic in compact instrument designs.
推荐
Precision Sensor Conditioning Front End
The CS5525-ASZR front-ends low-output sensors (pH probes, gas sensors, strain gauges, blood-pressure transducers) by integrating instrumentation-amp, PGA, and ADC in one IC, condensing a multi-chip discrete design into a single 20-pin footprint. The 4-bit digital I/O doubles as a range-select or mode-select bus for sensor multiplexing in multi-channel instruments, and the on-chip calibration lets the system store per-sensor correction coefficients in EEPROM. Combined with a clean +5 V LDO and low-impedance reference, the part delivers the noise floor needed for medical-grade sensor readouts.
推荐
推荐产品汇总
工程参考数据： CS5525-ASZR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | CS5525-ASZ | CS5526-ASZR | CS5526-ASZ | CS5532-ASZR |
|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Package | 20-SSOP (5.30 mm) | 20-SSOP (5.30 mm) - same | 20-SSOP (5.30 mm) - same | 20-SSOP (5.30 mm) - same | 20-SSOP (5.30 mm) - same |
| Resolution | 16 bits | 16 bits | 20 bits | 20 bits | 24 bits |
| Architecture | Multi-range Sigma-Delta | Multi-range Sigma-Delta | Multi-range Sigma-Delta | Multi-range Sigma-Delta | Sigma-Delta (low-noise differential) |
| Input Channels | 1 differential | 1 differential | 1 differential | 1 differential | 2 differential |
| Output Word Rate (max) | ~3.76 Hz (XIN = 32.768 kHz) | ~3.76 Hz | ~3.76 Hz | ~3.76 Hz | programmable sigma-delta, scales with XIN |
| Analog Supply | 3 V to 5 V | 3 V to 5 V | 3 V to 5 V | 3 V to 5 V | 3 V to 5 V |
| Integrated Front End | Instrumentation amp + PGA + self/system cal | Instrumentation amp + PGA + self/system cal | Instrumentation amp + PGA + self/system cal | Instrumentation amp + PGA + self/system cal | PGA + chopper-stabilized buffer + self/system cal |
| Packaging | Tape & Reel (TR) | Tube | Tape & Reel (TR) | Tube | Tape & Reel (TR) |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
关键差异点
- 1-channel converter with on-chip instrumentation amplifier and PGA - eliminates an external front-end op-amp chain （对比 CS5532-ASZR)
- 16-bit resolution at 3.76 Hz output word rate with self-/system-calibration - matches typical weigh-scale full-scale outputs directly （对比 CS5526-ASZR)
- True bipolar inputs from +/-25 mV to +/-5 V differential - directly digitizes thermocouple and bridge outputs without external level shifting （对比 MAX31855 (typical competitor thermocouple front-end))
- 8 selectable digital filter responses - allows trade-offs between 60/50 Hz mains rejection and conversion speed in one IC （对比 CS5534-ASZ)
设计说明
Estimated: derive AVdd and DVdd from separate low-noise LDOs (e.g., a TPS7A4701 for analog and an MCP1700 for digital) to prevent digital switching noise from coupling into the high-impedance AIN+/AIN- differential pair. Place 10 uF + 0.1 uF ceramic bypass on each supply pin right at the SSOP-20 body and a 100 ohm ferrite between the analog LDO and the CS5525 AVDD pin. The reference documentation indicates that supply ripple directly degrades effective resolution at low output word rates.
Estimated analog-good practice: route AIN+/AIN- as a guarded, length-matched differential pair over a continuous ground pour, and keep SDO/SCLK traces on the opposite PCB layer. Decouple REF IN+/REF IN- with a 100 nF NPO/C0G ceramic close to the IC, and use the VBIAS bypass capacitor the datasheet specifies - omitting VBIAS decoupling degrades the part's linearity. Keep digital lines at least 5 mm away from the analog inputs to avoid digital edge coupling.
Watch out: the 4-bit transparent latch on DIO0..DIO3 toggles simultaneously with SDO updates; if those pins drive external multiplexers, add 100 ohm series resistors to dampen digital edge ringing back into the analog domain. Long SDI/SDO traces need a 33 ohm source-termination for cables longer than ~50 mm, and XIN/XOUT must be guarded from the crystal ground node to keep master-clock phase noise out of the modulator sampling path.
Critical: do not power the CS5525-ASZR from a digital-only +5 V rail - the reference documentation warns that digital hash on AVdd couples through the modulator and degrades effective resolution by several bits. Always run the on-chip self-calibration after every power-up or after any temperature change greater than ~10 C. Estimating: the offset-drift temperature coefficient (per CS5525/26 datasheet) and the PGA gain drift must be calibrated out, or weigh-scale accuracy classes (OIML R76 / NTEP HB44) will fail at one corner of the industrial temperature range.
Optional: at the low output word rate of 3.76 Hz, the SSOP-20 dissipates well under 100 mW, so thermal management is not a primary concern; however, in a sealed outdoor junction box, provide thermal coupling to the metal enclosure to minimize self-heating temperature gradients against the load cell, which would otherwise introduce zero-balance drift. Reference documentation shows that even a few degrees of self-heating can be observed at the load-cell surface during continuous conversion.
合规信息
RoHS-compliance and lead-free finish confirmed per Cirrus Logic product page. Halogen-free status is [DATA_NEEDED]. The part appears on the Cirrus Logic discontinued products list as last-time-buy, so AEC-Q100 qualification is not applicable for new automotive designs - consider the CS5534 family for industrial/automotive upgrades.
