10M08DCV81C7G vs 10M08DCV81I7G 对比

详细并排对比 10M08DCV81C7G 出自 Altera 和 10M08DCV81I7G 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 10M08DCV81C7G 10M08DCV81I7G
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $16.20 $26.85
Family MAX 10 —
Logic Elements (LE) 8000 8000
Memory Bits 387072 bits —
Embedded Memory (M9K Blocks) [DATA_NEEDED: M9K block count] —
Multipliers (18x18) 56 —
Process Technology 55 nm —
Core Supply Voltage 1.2 V —
User I/O Banks [DATA_NEEDED: user I/O count] —
封装 81-UFBGA, WLCSP —
Package Code V81 —
On-chip Configuration Flash Yes (dual-configuration) —
Integrated ADC Yes (12-bit SAR, hardened) —
PLLs [DATA_NEEDED: PLL count] —
工作温度 Commercial (0C to +85C) [DATA_NEEDED: temp grade letter C7G] Industrial -40C to +100C (I7 grade)
安装类型 Surface Mount Surface Mount (WLCSP - requires underfill)
RoHS 状态 Compliant Compliant
Lead Free Yes —
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
Product Family — MAX 10
Embedded User Flash — 387072 bit (378 Kbit)
Maximum User I/Os — 56
Package Type — 81-ball WLCSP (UFBGA, wafer-level chip-scale package)
Process Node — [DATA_NEEDED: process node]
Configuration Memory — On-chip dual-configuration flash, instant-on
Embedded ADC — 12-bit SAR ADC (1 Msps) [DATA_NEEDED: number of channels]
Supply Voltage Core — [DATA_NEEDED: VCC core voltage]
I/O Bank Count — [DATA_NEEDED: number of I/O banks]
I/O Standards Supported — LVCMOS, LVTTL, LVDS, SSTL, RSDS
Memory Interfaces — DDR3, DDR3L, LPDDR2 (external PHY required)
PLL Count — [DATA_NEEDED: number of PLLs]
Global Clock Networks — [DATA_NEEDED: clock network count]
Configuration Modes — JTAG, Active Serial (AS), Passive Serial (PS)
Design Software — Intel Quartus Prime (MAX 10 device support)

数据手册与资源

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