5CSXFC6C6U23I7LN vs 5CSXFC6C6U23C8NES 对比
详细并排对比 5CSXFC6C6U23I7LN 出自 Altera 和 5CSXFC6C6U23C8NES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5CSXFC6C6U23I7LN | 5CSXFC6C6U23C8NES |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $119.55 | $195.00 |
| Family | Cyclone V SX SoC FPGA | Cyclone V SX |
| Device Variant | 5CSXFC6C6U23 | — |
| Logic Elements | 110K | 110,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 925 MHz | — |
| 封装 | 672-UBGA (23x23 mm) | 672-pin UBGА (23x23 mm) |
| 工作温度 | -40C to +100C (Industrial) | — |
| Process Technology | 28 nm low-power | — |
| Embedded Memory | [DATA_NEEDED: total Kbits] | — |
| DSP Blocks | Variable-precision, supports 18x18 and 27x27 multipliers | — |
| Transceivers | Integrated high-speed transceivers | — |
| HPS Peripherals | USB, GbE, SD/SDIO/MMC, UART, SPI, I2C | — |
| Memory Interfaces | DDR3, DDR2, LPDDR2 | — |
| I/O Standards | LVDS, LVCMOS, SSTL | — |
| Configuration | HPS boot from NAND/NOR/SD/eMMC; FPGA via Quartus Prime | — |
| RoHS 状态 | Compliant | Compliant |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Device Type | — | SoC FPGA (FPGA + ARM Cortex-A9 HPS) |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency (max) | — | 600 MHz |
| Process Node | — | 28 nm TSMC low-power |
| Embedded Memory (M10K + MLAB) | — | 5,140 Kbits (approx) |
| DSP Blocks (18x19 multipliers) | — | 112 |
| User I/O Pins | — | 224 |
| Speed Grade | — | 8 (commercial) |
| 工作结温 | — | 0C to +85C (commercial) |
| External Memory Interfaces | — | DDR2, DDR3, LPDDR2 |
| Hard PCIe Gen2 Controllers | — | 2 |