5M1270ZT144I5 vs 5M1270ZT144C5N 对比

详细并排对比 5M1270ZT144I5 出自 Intel 和 5M1270ZT144C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M1270ZT144I5 5M1270ZT144C5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $11.95 $12.45
Family MAX V —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 980 —
User I/Os 114 114
Logic Array Blocks (LABs) 8 —
Internal Frequency 201 MHz —
Propagation Delay (tPD) 10 ns —
Core Supply Voltage 1.8 V —
I/O Voltage Support 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V —
User Flash Memory 8 Kbits —
封装 TQFP-144 (22 × 22 mm, 0.5 mm pitch) TQFP-144 (22 x 22 mm, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount
工作温度 -40 °C to +100 °C (Industrial) 0 C to +85 C (commercial grade)
Configuration Memory On-chip flash (non-volatile, instant-on) Flash (non-volatile, in-system programmable)
Programming Interface JTAG (IEEE 1149.1) JTAG in-system programmable (Altera Quartus II)
RoHS 状态 Compliant Compliant
Lead-Free Yes —
Series — MAX V
Logic Elements — 1270
Macrocells — 980
Maximum Internal Frequency — 118.3 MHz
Pin-to-Pin Propagation Delay (tPD) — 6.2 ns
Internal Frequency (typical) — 201 MHz
User Flash Memory (UFM) — 8 Kbits
VCCINT (Core Supply) — 1.71 V to 1.89 V
VCCIO (I/O Supply, per bank) — 1.2 V to 3.3 V
Number of I/O Banks — 4
Supported I/O Standards — LVCMOS, LVTTL, PCI up to 3.3 V, 1.2 V to 3.3 V LVCMOS on JTAG pins
JTAG Interface — IEEE 1149.1 (TMS, TDI, TDO, TCK in Bank 1)
Program/Erase Cycles — Up to 100,000

数据手册与资源

浏览全部产品 创建 BOM 获取报价