5M570ZE64I5N vs 5M240ZM68I5N 对比

详细并排对比 5M570ZE64I5N 出自 Intel 和 5M240ZM68I5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
5M570ZE64I5N 5M570ZE64I5N - 570 LE MAX V CPLD, 64-EQFP | Intel

5M570ZE64I5N - 570 LE MAX V CPLD, 64-EQFP | Intel

5M570ZE64I5N ✓ 量产中
Intel
5M240ZM68I5N 5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N ✓ 量产中

规格对比

参数 5M570ZE64I5N 5M240ZM68I5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $7.20 $1.25
Series MAX V MAX V
Programmable Type In System Programmable —
Number of Logic Elements / Blocks 570 —
Number of Macrocells 440 192
Number of User I/O 54 —
Propagation Delay tpd(1) Max 9 ns —
Internal Supply Voltage VCCINT 1.71 V to 1.89 V (1.8 V typical) —
工作温度范围 -40 C to +100 C (TJ) —
安装类型 Surface Mount Surface Mount
封装 / 外壳 64-TQFP Exposed Pad (EQFP-64) —
Supplier Device Package 64-EQFP (7x7 mm) —
Configuration Memory Non-volatile Flash Nonvolatile Flash
Programmable I/O Voltage Standards 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) —
Programming Interface JTAG (IEEE 1149.1) —
RoHS 状态 Compliant Compliant
Lead-Free Yes —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements — 240
Propagation Delay (tPD) — 7.5 ns
Package Type — TFBGA-68
Number of Terminals — 68 (ball)
Package Code — TFBGA
Form of Terminal — Ball
Package Shape — Square
Operating Temperature Grade — Industrial
JTAG Interface — TMS, TDI, TDO, TCK (Bank 1)
Programming Method — JTAG / in-system programmable
电源电压 — [DATA_NEEDED: VCCINT and VCCIO levels]
I/O Standards — Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins)
Lead Free — Yes

数据手册与资源

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