74HC165D,653 vs 74HC165D,652 对比

详细并排对比 74HC165D,653 出自 Nexperia 和 74HC165D,652 出自 Nexperia。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 74HC165D,653 74HC165D,652
品牌 Nexperia Nexperia
分类 Logic ICs Logic ICs
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $0.15 $0.16
Logic Type Shift Register (Parallel-in/Serial-out) Shift Register
功能 Parallel or Serial to Serial Parallel or Serial to Serial
Number of Elements 1 1
Number of Bits per Element 8 8
输出类型 Differential (Q7 and Q7-bar complementary outputs) Differential (complementary Q7 and Q7-bar)
Supply Voltage (VCC) 2 V to 6 V 2 V to 6 V
Input Voltage 0 V to VCC —
Output Drive (IO) ±5.2 mA —
Propagation Delay (tpd) 6 ns typical at VCC = 5 V, CL = 50 pF [DATA_NEEDED: explicit propagation delay value] —
工作温度 -40 C to +125 C -40 °C to +125 °C
封装 16-pin SOIC (SOT109-1) 16-SOIC (SOT109-1), 0.154" (3.90 mm) width
安装类型 Surface Mount Surface Mount
MSL 等级 1 (per JEDEC J-STD-020) —
RoHS 状态 Compliant Compliant
JEDEC Compliance JESD7A (per datasheet) —
Pin Compatibility LSTTL 74LS165 —
Technology High-speed Si-gate CMOS —
Logic Family — 74HC (high-speed Si-gate CMOS)
Input Type — CMOS (HC); pin-compatible with TTL/LSTTL
引脚数 — 16
Standard Compliance — JEDEC standard no. 7A
Pin Compatible With — Low-power Schottky TTL (LSTTL)
Parallel Load — Asynchronous via SH/LD-bar
Serial Data Input — DS (for daisy-chaining)
Clock Input — CP (rising-edge triggered) with clock inhibit (CE-bar)

数据手册与资源

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