A42MX09-2PLG84I vs A42MX24-2PLG84I 对比

详细并排对比 A42MX09-2PLG84I 出自 Microchip Technology 和 A42MX24-2PLG84I 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Microchip Technology
A42MX09-2PLG84I A42MX09-2PLG84I - 14K Gate 5V FPGA 84-PLCC | Microchip

A42MX09-2PLG84I - 14K Gate 5V FPGA 84-PLCC | Microchip

A42MX09-2PLG84I ✓ 量产中
Microchip Technology
A42MX24-2PLG84I A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip

A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip

A42MX24-2PLG84I ✓ 量产中

规格对比

参数 A42MX09-2PLG84I A42MX24-2PLG84I
品牌 Microchip Technology Microchip Technology
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $29.80 $55.40
Family MX (42MX) MX (42MX)
System Gates 14000 36000 gates
User I/O Pins 72 —
Logic Cells 336 912 cells
Core Supply Voltage 4.5 V to 5.5 V —
I/O Supply Voltage 3 V to 3.6 V (dual supply) —
Speed Grade -2 -2
Clock-to-Out 5.6 ns —
Dual-Port SRAM Access Time 5 ns —
Dual-Port SRAM Up to 2.5 kbits configurable —
Maximum Performance 250 MHz —
工作温度 -40C to +85C (Industrial) -40C to +85C (Industrial)
封装 84-PLCC (J-Lead), surface mount 84-PLCC (J-Lead)
安装类型 Surface Mount Surface Mount
Process Technology 0.45 um —
RoHS 状态 Lead Free Lead Free (per Kynix listing)
Number of Logic Blocks [DATA_NEEDED: number of logic blocks] —
User I/O — 72
Technology — 0.45 um antifuse
Core Architecture Voltage — 5.0 V
I/O Voltage Support — 3.3 V / 5.0 V mixed
Programmability — One-Time Programmable (antifuse)
Configuration — No external boot device required
Dedicated Decode Blocks — D-modules (wide-input AND, CPLD-like)
Packaging — Tray
Primary Applications — ASIC alternative, legacy PLD integration

数据手册与资源

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