EP1810JI-45 vs EP1810GM883B 对比

详细并排对比 EP1810JI-45 出自 Altera 和 EP1810GM883B 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1810JI-45 EP1810GM883B
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.75 $125.40
Manufacturer Altera (now Intel FPGA) —
Series Classic EPLD Family —
Device Type UV-Erasable / OTP Complex PLD —
Macrocell Count 48 —
Maximum Operating Frequency 33.3 MHz —
Propagation Delay (tPD) 50 ns 50 ns max
Configurable I/O Lines 48 —
Dedicated Inputs 12 12
Technology CMOS EPROM CMOS, UV-erasable
Package Code QCCJ —
Package Type 68-pin JLCC (J-leaded ceramic chip carrier) Ceramic Pin Grid Array (PGA), 84 pins
Terminal Form J BEND —
Package Shape SQUARE —
Number of Terminals 68 —
Temperature Grade INDUSTRIAL —
工作温度 -40 °C to +85 °C -55 °C to +125 °C (Military, MIL-STD-883B)
电源电压 5 V (TTL compatible) —
Programming Method UV-erase (windowed) / OTP via JEDEC UV-erasable / Altera programming hardware
Device Family — EP1810 (Classic EPLD)
Macrocells — 48
User Flip-Flops — Up to 64
Total Inputs — 60
I/O Pins — 48 (bidirectional, tri-state)
Supply Voltage (VCC) — 4.5 V to 5.5 V
Package Designator — GM (ceramic PGA)
Processing Level — MIL-STD-883B (Class B)
安装类型 — Through-hole (PGA socket or PCB through-hole)
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]
Logic Family — TTL-compatible I/O

数据手册与资源

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