EP1830-20CFN vs EP1810LI-35 对比
详细并排对比 EP1830-20CFN 出自 Texas Instruments 和 EP1810LI-35 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1830-20CFN | EP1810LI-35 |
|---|---|---|
| 品牌 | Texas Instruments | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.85 | $78.05 |
| Device Type | Erasable Programmable Logic Device (EPLD) | Erasable Programmable Logic Device (EPLD) |
| Technology | CMOS EPROM | CMOS, UV-erasable EPROM configuration cell |
| Macrocell Count | 48 | — |
| Propagation Delay (tPD) | 22 ns | 35 ns |
| Maximum Supply Voltage | 5.25 V | — |
| I/O Pins | 48 | — |
| Dedicated Inputs | 12 | — |
| 封装 | PLCC-68 (QCCJ, J-lead) | 68-pin PLCC (J-Lead, plastic) |
| Terminal Pitch | 1.27 mm | — |
| Terminal Form | J-Bend | — |
| Package Code | QCCJ | — |
| Package Shape | Square | — |
| Operating Temperature Grade | Commercial (0C to 70C) | — |
| Typical Operating Current | 20 mA at 1 MHz | — |
| Maximum Counter Frequency | 50 MHz (4 x 12-bit counters) | — |
| Speed Grade | -20 | 35 (slowest in EP1810L family) |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Rochester Electronics, LLC (original Altera design) |
| Part Family | — | Altera Classic EPLD |
| Macrocells | — | 48 |
| Pin/Package Code | — | PLCC-68 / PQCC68 |
| 电源电压 | — | 5 V (TTL-compatible I/O) |
| 工作温度 | — | -40 C to +85 C (industrial, 'I' suffix) |
| 安装类型 | — | Surface Mount (PLCC socket compatible) |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| Logic Elements | — | Logic Array Blocks (LABs) connected via Programmable Interconnect Array (PIA) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL 等级 | — | [DATA_NEEDED: MSL rating] |