EP1K100FC4842N vs EP1K100FI4842 对比
详细并排对比 EP1K100FC4842N 出自 Altera 和 EP1K100FI4842 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1K100FC4842N | EP1K100FI4842 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $49.80 | $54.30 |
| Series | ACEX-1K | — |
| Family | ACEX-1K Programmable Logic Device Family | ACEX-1K |
| Typical Gates | 100,000 | — |
| Logic Elements | 4,992 | 4,992 |
| Embedded Memory (EAB) | 49,152 bits | — |
| Number of LABs/CLBs | 624 | — |
| Number of I/O | 333 | — |
| Number of EABs | 12 | 6 |
| Voltage - Core | 2.5 V | — |
| Voltage - I/O | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) | — |
| Speed Grade | -2 | — |
| 工作温度 | 0C to +70C (commercial) | -40C to +85C (Industrial) |
| 封装 / 外壳 | 484-BBGA | — |
| 安装类型 | Surface Mount | — |
| Process Technology | 0.18 µm CMOS, SRAM-based | 0.18 um CMOS SRAM |
| JTAG (IEEE 1149.1) | Yes (boundary-scan) | — |
| PCI Compliance | 66 MHz | — |
| Configuration Method | SRAM / passive serial / JTAG | Passive Serial / Byte-Wide Parallel via JTAG |
| System Gates | — | 100,000 |
| Total RAM Bits | — | 49,152 |
| Number of LABs | — | 624 |
| User I/O Pins | — | 333 |
| 封装 | — | 484-FBGA (FineLine BGA) |
| Core Voltage | — | 2.5 V |
| I/O Standards | — | MultiVolt (2.5V / 3.3V / 5.0V) |
| Internal Performance | — | up to 250 MHz |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| RoHS 状态 | — | Compliant |