EP1K30F256-3 vs EP1K100FC256-3 对比

详细并排对比 EP1K30F256-3 出自 Altera 和 EP1K100FC256-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K30F256-3 EP1K100FC256-3
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $15.60 $30.22
Family ACEX 1K ACEX-1K
Logic Elements 1,728 4,992
Equivalent Gates 30,000 —
Configurable Logic Blocks (CLBs) 216 —
Embedded Memory (RAM bits) 24,576 —
Maximum User I/O Pins 171 —
最大时钟频率 909 MHz —
Speed Grade -3 -3
Core Voltage 1.8 V —
Process Technology 0.18 µm CMOS SRAM 0.22 µm CMOS
封装 FBGA-256 (FineLine BGA) 256-ball FineLine BGA (FBGA-256)
安装类型 Surface Mount (BGA) Surface Mount
Configuration Method SRAM (requires external configuration device) —
JTAG Support Yes (IEEE 1149.1 / IEEE 1532) —
PLL Yes (on-chip) —
工作温度 [DATA_NEEDED: operating temperature range] Commercial (0°C to +70°C)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Typical Gates — 100,000
Embedded Memory (EAB RAM) — 49,152 bits
Number of LABs/CLBs — 624
User I/O Count — 186
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — [DATA_NEEDED: VCCIO voltage range]
Package Outline — [DATA_NEEDED: package dimensions mm]
MSL 等级 — [DATA_NEEDED: MSL rating]
Lead-Free — [DATA_NEEDED: lead-free status]
JTAG / Boundary Scan — IEEE 1149.1 compliant

数据手册与资源

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