EP1K30F256-3 vs EP1K30FC256-3AA 对比

详细并排对比 EP1K30F256-3 出自 Altera 和 EP1K30FC256-3AA 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1K30FC256-3AA EP1K30FC256-3AA - 30K Gate ACEX-1K FPGA, 256-FBGA | Altera

EP1K30FC256-3AA - 30K Gate ACEX-1K FPGA, 256-FBGA | Altera

EP1K30FC256-3AA ✓ 量产中

规格对比

参数 EP1K30F256-3 EP1K30FC256-3AA
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $15.60 $17.95
Family ACEX 1K ACEX-1K
Logic Elements 1,728 1,728
Equivalent Gates 30,000 —
Configurable Logic Blocks (CLBs) 216 —
Embedded Memory (RAM bits) 24,576 —
Maximum User I/O Pins 171 —
最大时钟频率 909 MHz —
Speed Grade -3 -3 (fastest)
Core Voltage 1.8 V 2.5 V
Process Technology 0.18 µm CMOS SRAM CMOS, SRAM-based
封装 FBGA-256 (FineLine BGA) 256-FBGA (FineLine Ball Grid Array)
安装类型 Surface Mount (BGA) Surface Mount
Configuration Method SRAM (requires external configuration device) —
JTAG Support Yes (IEEE 1149.1 / IEEE 1532) —
PLL Yes (on-chip) —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Typical Gates — 30,000
Embedded Memory (EAB RAM) — 24,576 bits
Maximum User I/O — 171
Logic Array Blocks (LABs) — 216
I/O Voltage — 3.3 V / 2.5 V / 1.8 V (bank-dependent)
Programming Interface — IEEE 1149.1 JTAG
LEs per LAB — 8 (typical for ACEX-1K)

数据手册与资源

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