EP1K50FC256-1 vs EP1K100FC256-1N 对比

详细并排对比 EP1K50FC256-1 出自 Altera 和 EP1K100FC256-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50FC256-1 EP1K100FC256-1N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $18.95 $22.10
Family ACEX 1K ACEX-1K
Logic Elements / Cells 2,880 —
System Gates 50,000 —
Maximum System Gates 199,000 —
Logic Array Blocks (LABs) 360 624
Embedded Memory (EAB) 40 Kbit (EAB-based) —
Total RAM Bits 40,960 —
User I/Os 186 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Operating Supply Voltage (Core) 2.5 V (2.375 V to 2.625 V) —
Process Technology 0.22 µm CMOS 0.18 µm SRAM-based
Maximum Internal Frequency 250 MHz —
Configuration Memory Type SRAM —
封装 256-ball FBGA (FineLine BGA) 256-ball FineLine BGA
安装类型 Surface Mount —
Operating Temperature Grade Commercial (0 °C to +70 °C) —
RoHS 状态 Non-compliant (per distributor data) —
Part Status Obsolete (per Arrow listing) —
Logic Elements — 4,992
Typical Gates — 100,000
Maximum User I/O — 186
Embedded SRAM — 49,152 bits
Embedded Array Blocks (EABs) — 12
Core Voltage — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL (1.5 V / 1.8 V / 2.5 V / 3.3 V)
Operating Temperature (Commercial) — 0 °C to +70 °C
Speed Grade — -1
Configuration Mode — Passive Serial / Passive Parallel (Synchronous & Asynchronous)
JTAG Support — IEEE 1149.1 Boundary-Scan
Lead-Free (N suffix) — Yes (Pb-free BGA)

数据手册与资源

浏览全部产品 创建 BOM 获取报价