EP1K50FC256-1 vs EP1K30FC256-1 对比

详细并排对比 EP1K50FC256-1 出自 Altera 和 EP1K30FC256-1 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50FC256-1 EP1K30FC256-1
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $18.95 $17.85
Family ACEX 1K ACEX-1K
Logic Elements / Cells 2,880 —
System Gates 50,000 —
Maximum System Gates 199,000 —
Logic Array Blocks (LABs) 360 216
Embedded Memory (EAB) 40 Kbit (EAB-based) —
Total RAM Bits 40,960 —
User I/Os 186 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Operating Supply Voltage (Core) 2.5 V (2.375 V to 2.625 V) —
Process Technology 0.22 µm CMOS 2.5 V CMOS
Maximum Internal Frequency 250 MHz 250 MHz (per family datasheet)
Configuration Memory Type SRAM —
封装 256-ball FBGA (FineLine BGA) 256-pin FineLine BGA (FBGA)
安装类型 Surface Mount Surface Mount (BGA)
Operating Temperature Grade Commercial (0 °C to +70 °C) Commercial (0C to +70C)
RoHS 状态 Non-compliant (per distributor data) Compliant
Part Status Obsolete (per Arrow listing) —
Logic Elements — 17,280
Typical Gates — 30,000
Logic Cells — 1,728
Embedded RAM Bits — 24,576
User I/O Pins — 171
Embedded Array Blocks (EABs) — 6
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 3.3 V / 2.5 V (multi-voltage)
Speed Grade — -1 (standard, slowest in family)
Configuration Interface — Passive Serial / Passive Parallel / JTAG
Programming Method — SRAM-based, in-system programmable

数据手册与资源

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