EP1K50FC256-1 vs EP1K50FC256-1N 对比

详细并排对比 EP1K50FC256-1 出自 Altera 和 EP1K50FC256-1N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50FC256-1 EP1K50FC256-1N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $18.95 $15.10
Family ACEX 1K ACEX-1K
Logic Elements / Cells 2,880 —
System Gates 50,000 —
Maximum System Gates 199,000 199,000
Logic Array Blocks (LABs) 360 360
Embedded Memory (EAB) 40 Kbit (EAB-based) —
Total RAM Bits 40,960 —
User I/Os 186 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Operating Supply Voltage (Core) 2.5 V (2.375 V to 2.625 V) —
Process Technology 0.22 µm CMOS 0.22 um CMOS
Maximum Internal Frequency 250 MHz 250 MHz
Configuration Memory Type SRAM —
封装 256-ball FBGA (FineLine BGA) 256-ball FBGA (FineLine BGA)
安装类型 Surface Mount Surface Mount
Operating Temperature Grade Commercial (0 °C to +70 °C) —
RoHS 状态 Non-compliant (per distributor data) Compliant
Part Status Obsolete (per Arrow listing) —
Series — ACEX-1K (2.5 V)
Maximum Logic Elements — 2,880
Typical Gates — 50,000
Embedded Memory (EAB) Bits — 40,960 bits
User I/O Pins — 186
Core Supply Voltage — 2.5 V (2.375 V to 2.625 V)
Typical Operating Current — 5 mA
Speed Grade — -1 (commercial)
工作温度 — 0 C to 70 C (commercial)
Lead Status — Lead-free (-N suffix)
Programmable I/O Standards — LVTTL, LVCMOS, PCI, GTL+
Configuration Method — SRAM-based, JTAG (IEEE 1149.1)

数据手册与资源

浏览全部产品 创建 BOM 获取报价