EP1K50TI144-3N vs EP1K30TI144-3N 对比

详细并排对比 EP1K50TI144-3N 出自 Altera 和 EP1K30TI144-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TI144-3N EP1K30TI144-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $19.80 $21.80
Family ACEX 1K (EP1K) ACEX 1K
Series EP1K50 EP1K30
Logic Elements 2,880 1,728
Typical Gates 50,000 30,000
Embedded Array Blocks (EABs) 40 (4 Kbit each) —
Embedded Memory (EAB SRAM) 40,960 bits —
Maximum User I/O 102 —
Dedicated Inputs 6 —
Core Voltage (VCCINT) 2.375 V to 2.625 V (nominal 2.5 V) —
I/O Bank Voltage (VCCIO) 2.375 V to 5.0 V (multiVolt I/O) —
Speed Grade -3 (fastest ACEX 1K grade) -3 (fastest in EP1K30 family)
Maximum Internal Frequency 166.67 MHz (process node data) —
Process Technology 0.22 µm CMOS, SRAM-based 0.18 um CMOS, 4 metal layers
封装 144-pin TQFP (Industrial, Pb-free) TQFP-144 (0.5 mm pitch)
工作温度 -40 °C to +85 °C (Industrial) -40C to +85C (Industrial)
安装类型 Surface Mount Surface Mount (Gull-Wing)
Configuration Interface JTAG (IEEE 1149.1) + passive-serial —
RoHS 状态 Compliant (Pb-free terminal finish, "N" suffix) [DATA_NEEDED: RoHS status]
MSL 等级 [DATA_NEEDED: MSL level] —
Supply Current (typ/ICC) [DATA_NEEDED: ICC standby] —
Usable Gates — 17,500
Embedded Memory (EAB) — 24 Kbit (6 EABs of 4 Kbit each)
Maximum User I/O Pins — 102
Dedicated Input Pins — 6
Total Terminals — 144
Core Supply Voltage — 2.5 V nominal (2.375 V min, 2.625 V max)
Configuration Modes — Passive Serial, Passive Parallel Async, Passive Parallel Sync, JTAG (IEEE 1149.1)
PLLs — 4
Thermal Resistance (theta_JA) — Approximately 35-40 C/W (PCB-dependent)

数据手册与资源

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