EP1K50TI144-4N vs EP1K50TI144-3 对比

详细并排对比 EP1K50TI144-4N 出自 Altera 和 EP1K50TI144-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TI144-4N EP1K50TI144-3
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $10.40
Family ACEX 1K ACEX 1K
Device Type Field-Programmable Gate Array (FPGA) —
Typical Gates 50,000 —
Maximum Usable Gates 40,960 —
Logic Elements (LEs) 2,880 2,880
Embedded Array Blocks (EABs) 10 (12.6 Kbit total) 72
Maximum User I/O Pins 102 102
Dedicated Input Pins 6 6
Supply Voltage (VCCINT) 2.375 V to 2.625 V (nominal 2.5 V) 2.375 V to 2.625 V (2.5 V nominal)
I/O Bank Supply Voltages 2.5 V / 3.3 V / 5.0 V compatible (MultiVolt I/O) —
Process Technology 0.18 µm CMOS SRAM-based 0.22 µm CMOS SRAM
Speed Grade -4 -3
封装 144-pin TQFP (TQFP-144), 0.5 mm pitch 144-pin PQFP (TQFP, TI suffix)
Configuration Method Serial configuration EPROM (EPC2/EPC8) or JTAG —
Operating Temperature (Industrial 'N' suffix) -40 °C to +85 °C —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS status - not stated in provided data] [DATA_NEEDED: RoHS status of legacy ACEX 1K]
Lead-Free [DATA_NEEDED: lead-free status] —
Typical Gate Count — 50,000
Configurable Logic Blocks (CLBs) — 360
Embedded RAM Bits — 40,960
Propagation Delay (typical) — 12.5 ns
Operating Temperature (industrial) — -40 C to +85 C
Configuration Interface — JTAG (IEEE 1149.1) + serial/parallel

数据手册与资源

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