EP1S10B672C6 vs EP1S10B672C7 对比
详细并排对比 EP1S10B672C6 出自 Intel 和 EP1S10B672C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10B672C6 | EP1S10B672C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $185.00 | $140.00 |
| Manufacturer | Intel / Altera | Intel (formerly Altera) |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 10,570 | — |
| LABs / CLBs | 1,057 | — |
| User I/Os | 345 | — |
| 封装 | 672-BBGA (35 x 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core) | 1.5 V (1.425 V - 1.575 V) | 1.5 V |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Maximum Operating Frequency | 450.05 MHz | — |
| 工作温度 | 0 C to 85 C (Commercial Extended) | 0 °C to 85 °C (Commercial) |
| Logic Family | CMOS | CMOS |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Supplier Device Package | 672-BGA | — |
| Memory | Embedded TriMatrix (MRAM/M4K) blocks | — |
| DSP Blocks | Yes, dedicated multiply-accumulate blocks | Yes (DSP multiplier blocks) |
| Clock Management | PLLs for clock synthesis | — |
| Configuration | JTAG / passive serial / fast passive parallel | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS compliance] |
| Logic Elements | — | 10,570 |
| Embedded Memory (Total) | — | 920 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Package Type | — | 672-ball FineLine BGA |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.27 mm |
| Temperature Grade | — | Commercial (C) |
| Speed Grade | — | 7 |
| Configuration Method | — | JTAG / EPC serial configuration |