EP1S10F672C7N vs EP1S10F672I7N 对比
详细并排对比 EP1S10F672C7N 出自 Altera 和 EP1S10F672I7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10F672C7N | EP1S10F672I7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $118.00 |
| Series | Stratix | — |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | Yes (dedicated) |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| 工作温度 | 0C to +85C (Commercial) | 0C to 85C |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: per Intel PDN] |
| MSL 等级 | [DATA_NEEDED: MSL moisture sensitivity level] | 3 (per JEDEC J-STD-020, typical for BGA of this era) |
| Family | — | Stratix |
| Logic Elements | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1,057 |
| User I/Os | — | 345 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Internal Frequency | — | 420.17 MHz |
| 封装 | — | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch |
| Logic Family | — | CMOS |
| Embedded Memory | — | 920 Kbits (TriMatrix) |
| Configuration Interface | — | Active Serial / Passive Serial / JTAG |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Speed Grade | — | I7 (industrial, -7 speed bin) |