EP1S25B672C7N vs EP1S20B672C7N 对比

详细并排对比 EP1S25B672C7N 出自 Intel 和 EP1S20B672C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25B672C7N EP1S20B672C7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $620.15 $320.00
Family Stratix Stratix (original)
Logic Elements / Cells 25660 —
Number of User I/O 473 —
引脚数 672 —
Package Type 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch)
工作温度 0 °C to 85 °C (Commercial) 0 °C to 85 °C (Commercial Extended)
Supply Voltage (Core) 1.5 V —
Logic Family CMOS CMOS
Process Technology 130 nm 0.13 µm CMOS
Maximum Operating Frequency 420.17 MHz —
安装类型 Surface Mount Surface Mount (BGA)
Configuration Method SRAM-based, JTAG (IEEE 1149.1) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL —
Embedded Memory TriMatrix RAM blocks —
DSP Blocks Yes (dedicated multiplier/accumulator) —
PLLs Yes (on-die) —
RoHS 状态 Compliant (per Intel/Altera product page) [DATA_NEEDED: RoHS compliance]
Series — Stratix
Logic Elements (LEs) — 18,460
LABs / CLBs — 1,846
Embedded Memory Bits — 1,669,248 bits
Maximum User I/O — 426
Number of Pins / Balls — 672
Supply Voltage (Core, VCCINT) — 1.5 V
Speed Grade — -7
MSL 等级 — 3 (per JEDEC J-STD-020)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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