EP1S25F672C8N vs EP1S25F672C7N 对比

详细并排对比 EP1S25F672C8N 出自 Intel 和 EP1S25F672C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F672C8N EP1S25F672C7N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $179.40 $535.00
Family Stratix (EP1S) —
Logic Elements (LE) 25,660 —
Process Technology 130 nm CMOS 0.13 µm CMOS
Core Supply Voltage 1.5 V —
Embedded Memory 1,944 Kbit (TriMatrix) —
DSP Blocks 12 (9-bit x 9-bit multipliers) —
PLLs 6 —
Maximum User I/O 426 473
工作温度 0 °C to 85 °C (commercial) 0 °C to 85 °C (commercial)
Speed Grade C8 (-8) —
Package Type 672-ball FineLine BGA (FBGA) —
Package Dimensions 35 x 35 mm, 1.27 mm pitch —
Logic Family CMOS —
Maximum Internal Frequency 357.14 MHz —
Configuration Passive Serial / Passive Parallel / JTAG / EPC device —
RoHS 状态 Compliant (lead-free N suffix) [DATA_NEEDED: confirm from product page]
Origin Altera (acquired by Intel, 2015) —
Device Family — Stratix
Logic Elements (LEs) — 25,660
Logic Array Blocks (LABs) — 2,566
Embedded Memory Bits — 1,944,576
Number of I/O Pins — 672 (BGA balls)
封装 — 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch
Core Supply Voltage (VCCINT) — 1.5 V
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: bank-dependent 1.2 V–3.3 V]
安装类型 — Surface Mount
Configuration Method — JTAG / Passive Serial / Active Serial
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

浏览全部产品 创建 BOM 获取报价