EP1S25F672C8N vs EP1S25F672C7N Comparaison
Comparaison détaillée côte à côte de EP1S25F672C8N par Intel et EP1S25F672C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F672C8N | EP1S25F672C7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $179,40 | $535,00 |
| Family | Stratix (EP1S) | — |
| Logic Elements (LE) | 25,660 | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Supply Voltage | 1.5 V | — |
| Embedded Memory | 1,944 Kbit (TriMatrix) | — |
| DSP Blocks | 12 (9-bit x 9-bit multipliers) | — |
| PLLs | 6 | — |
| Maximum User I/O | 426 | 473 |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 °C to 85 °C (commercial) |
| Speed Grade | C8 (-8) | — |
| Package Type | 672-ball FineLine BGA (FBGA) | — |
| Package Dimensions | 35 x 35 mm, 1.27 mm pitch | — |
| Logic Family | CMOS | — |
| Maximum Internal Frequency | 357.14 MHz | — |
| Configuration | Passive Serial / Passive Parallel / JTAG / EPC device | — |
| Statut RoHS | Compliant (lead-free N suffix) | [DATA_NEEDED: confirm from product page] |
| Origin | Altera (acquired by Intel, 2015) | — |
| Device Family | — | Stratix |
| Logic Elements (LEs) | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory Bits | — | 1,944,576 |
| Number of I/O Pins | — | 672 (BGA balls) |
| Boîtier | — | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Type de montage | — | Surface Mount |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |