EP1S60F1020C5N vs EP1S60F1020C6N 对比

详细并排对比 EP1S60F1020C5N 出自 Intel 和 EP1S60F1020C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S60F1020C5N EP1S60F1020C6N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $2,050.00 $195.00
Family Stratix Stratix (EP1S)
Logic Elements (LEs) 57,120 57,120
Logic Array Blocks (LABs) 6,570 —
Total RAM Bits 5,215,104 —
Process Technology 130 nm CMOS —
Core Supply Voltage 1.425 V to 1.575 V —
工作温度 0 C to 85 C (commercial) 0°C to +85°C (Commercial)
Speed Grade C5 (commercial, slowest) C6 (mid-tier)
封装 1020-ball FBGA (33 x 33 mm, 1 mm pitch) —
Lead-Free (N suffix) Yes —
安装类型 Surface Mount Surface Mount (BGA)
Maximum Toggle Frequency [DATA_NEEDED: fMAX figure per logic block] —
Logic Family CMOS —
Supplier Device Package 1020-FBGA (33x33) —
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
Series — Stratix
Logic Cells — 6,570 blocks (per chipdig datasheet summary)
Embedded RAM (Total Bits) — 5,215,104 bits
Embedded Multipliers — 773 (18x18)
Maximum User I/O Pins — Per datasheet, package-dependent (F1020 variant)
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
电源电压 — Per datasheet (Stratix Device Handbook Vol. 1)
Lead-Free / Pb-Free — Yes (suffix 'N')
RoHS 状态 — Compliant (per 'N' suffix)
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

数据手册与资源

浏览全部产品 创建 BOM 获取报价