EP1S60F1020C6N vs EP1S60F1020I6N 对比
详细并排对比 EP1S60F1020C6N 出自 Intel 和 EP1S60F1020I6N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S60F1020C6N | EP1S60F1020I6N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $3,650.00 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S) | Stratix FPGA (1st generation) |
| Logic Elements (LEs) | 57,120 | 57,120 |
| Logic Cells | 6,570 blocks (per chipdig datasheet summary) | 6,570 |
| Embedded RAM (Total Bits) | 5,215,104 bits | — |
| Embedded Multipliers | 773 (18x18) | — |
| Maximum User I/O Pins | Per datasheet, package-dependent (F1020 variant) | — |
| Package Type | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch | — |
| Logic Family / Process | CMOS, 0.13 µm | — |
| 工作温度 | 0°C to +85°C (Commercial) | — |
| 电源电压 | Per datasheet (Stratix Device Handbook Vol. 1) | 1.425 V to 1.575 V (1.5 V nominal core) |
| Speed Grade | C6 (mid-tier) | 6 |
| Lead-Free / Pb-Free | Yes (suffix 'N') | — |
| RoHS 状态 | Compliant (per 'N' suffix) | Compliant |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等级 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Configuration | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins | — |
| PLL Count | 12 (per Stratix family datasheet) | — |
| Memory Block Types | TriMatrix (M512, M4K, M-RAM) | — |
| Logic Array Blocks (LABs) | — | 5,712 |
| Total RAM Bits | — | 5,215,104 |
| User I/O Count | — | 773 |
| 工作温度范围 | — | 0°C to 85°C (I6 grade) |
| Process Node | — | 0.13 µm CMOS |
| 封装 | — | 1020-FBGA (33 x 33 mm, 1.0 mm pitch) |
| Temperature Grade | — | I (Industrial) |