EP1SGX25CF672I6 vs EP1SGX25DF800I6N 对比
详细并排对比 EP1SGX25CF672I6 出自 Intel 和 EP1SGX25DF800I6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EP1SGX25DF800I6N - Stratix GX FPGA, 25K LE, 20x 3.1875 Gbps Transceivers | Intel / Altera
EP1SGX25DF800I6N ⚠ 最后一次采购规格对比
| 参数 | EP1SGX25CF672I6 | EP1SGX25DF800I6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $1,450.00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | [DATA_NEEDED: logic element count] |
| Logic Array Blocks (LABs) | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| User I/O Pins | 455 | — |
| Core Supply Voltage | 1.425 V to 1.575 V (1.5 V typical) | — |
| Process Technology | 130 nm CMOS | — |
| Internal Clock Performance | Up to 5000 MHz | — |
| 封装 | 672-ball FBGA (27 x 27 mm, 1 mm pitch) | 800-pin FineLine BGA (DF800) |
| 安装类型 | Surface Mount | — |
| 工作结温 | -40C to +100C | — |
| Transceiver Count | [DATA_NEEDED: precise number of SERDES channels per pin list] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count per Stratix GX device data sheet] | Up to 22 DSP blocks |
| RoHS 状态 | Compliant (lead-free FBGA) | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Transceiver Channels | — | 4 to 20 channels |
| Maximum Transceiver Data Rate | — | 3.1875 Gbps per channel |
| CDR / SERDES | — | Embedded clock-data recovery and SERDES |
| Memory | — | TriMatrix memory, up to 2 Mbits |
| Hard IP | — | PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) |
| Source-Synchronous Channels | — | 8 channels |
| I/O Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| Speed Grade | — | -6 (production grade) |
| Temperature Range | — | Industrial -40C to +100C |
| Protocol Support | — | Gigabit Ethernet, SONET/SDH, PCI Express, custom serial |