EP1SGX25DF1020C6ESL vs EP1SGX25DF1020C6ES 对比

详细并排对比 EP1SGX25DF1020C6ESL 出自 Altera 和 EP1SGX25DF1020C6ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1SGX25DF1020C6ES EP1SGX25DF1020C6ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera

EP1SGX25DF1020C6ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera

EP1SGX25DF1020C6ES ⚠ 最后一次采购

规格对比

参数 EP1SGX25DF1020C6ESL EP1SGX25DF1020C6ES
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $1,095.00 $285.00
Family Stratix GX Stratix GX
Logic Elements 25,660 25660 cells
Total RAM Bits 1,944,576 bits [DATA_NEEDED: total RAM bits]
User I/O Pins 607 —
LABs/CLBs 2,566 —
封装 1020-BBGA (FineLine BGA) FBGA-1020, 33 mm × 33 mm, 1.00 mm pitch
Core Voltage 1.5 V —
工作结温 0 C to 85 C —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: confirm RoHS]
Configuration Method Passive Serial / Fast Passive Parallel / JTAG —
Process Node 0.13 um CMOS —
Transceivers Embedded multi-gigabit transceivers (per Stratix GX family) —
DSP Blocks Yes (embedded DSP blocks) Yes
Speed Grade C6 —
I/O Standards Supported LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) —
Configurable Logic Blocks (CLBs) — 2566
Maximum User I/Os — 607
Number of LABs/CLBs — 2566
工作温度 — 0 C to 85 C
Supply Voltage (Core) — 1.5 V
Process Technology — 130 nm CMOS
Logic Family — CMOS
Lead-Free — Yes
Configuration Interface — JTAG / Passive Serial / Passive Parallel
Embedded Transceivers — Yes (multi-gigabit)

数据手册与资源

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