EP1SGX25FF1020 vs EP1SGX25FF1020CS 对比

详细并排对比 EP1SGX25FF1020 出自 Altera 和 EP1SGX25FF1020CS 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25FF1020 EP1SGX25FF1020CS
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $295.00 $171.00
Family Stratix GX Stratix GX
Logic Elements (LE) 25,660 —
Configurable Logic Blocks (CLB) 2,566 —
Embedded Memory (bits) 1,944,576 —
Process Technology 130 nm CMOS —
Logic Cells (per FPGAkey) 25,660 —
Combinatorial Delay (Tpd) 7.49 ns (per Microchip USA datasheet summary) —
Operating Frequency (max) [DATA_NEEDED: max internal operating frequency] —
封装 1020-ball FCBGA (PBGA, 1.00 mm pitch) 1020-ball FC-FBGA
Pin/Package Count 1020 —
安装类型 Surface Mount (BGA) Surface Mount
工作温度 -40C to +85C (industrial variant) / 0C to +85C (commercial variant) —
电源电压 [DATA_NEEDED: core VCC voltage] —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Compliant
Serial Transceivers Embedded SERDES (multi-gigabit, protocol-dependent) —
DSP Blocks Embedded dedicated multipliers —
PLL / Clock Management Embedded PLLs —
Configuration Method SRAM-based, configuration via JTAG / passive serial / fast passive parallel —
Logic Elements — 25,660
Logic Array Blocks (LABs) — 2566
User I/Os — 607
Process Node — 130 nm
Core Voltage — 1.5 V
Embedded Transceivers — Yes (Stratix GX feature)
Operating Temperature Grade — Commercial (0C to +85C, 'C' suffix)
Speed Grade — 'S' suffix per Altera nomenclature
Configuration — Serial / JTAG (per Stratix GX family)
Lead-Free — Yes
Lifecycle — Obsolete (legacy Stratix GX family)

数据手册与资源

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