EP1SGX25FF1020 vs EP1SGX25FF1020I5 对比

详细并排对比 EP1SGX25FF1020 出自 Altera 和 EP1SGX25FF1020I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1SGX25FF1020I5 EP1SGX25FF1020I5 - Stratix GX FPGA, 25.6K Logic Cells | Intel / Altera

EP1SGX25FF1020I5 - Stratix GX FPGA, 25.6K Logic Cells | Intel / Altera

EP1SGX25FF1020I5 ⚠ 最后一次采购

规格对比

参数 EP1SGX25FF1020 EP1SGX25FF1020I5
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $295.00 $1,490.00
Family Stratix GX Stratix GX
Logic Elements (LE) 25,660 —
Configurable Logic Blocks (CLB) 2,566 —
Embedded Memory (bits) 1,944,576 —
Process Technology 130 nm CMOS 130 nm CMOS
Logic Cells (per FPGAkey) 25,660 —
Combinatorial Delay (Tpd) 7.49 ns (per Microchip USA datasheet summary) —
Operating Frequency (max) [DATA_NEEDED: max internal operating frequency] —
封装 1020-ball FCBGA (PBGA, 1.00 mm pitch) 1020-ball FC-FBGA (FF1020)
Pin/Package Count 1020 —
安装类型 Surface Mount (BGA) Surface Mount (Flip-Chip BGA)
工作温度 -40C to +85C (industrial variant) / 0C to +85C (commercial variant) —
电源电压 [DATA_NEEDED: core VCC voltage] —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Serial Transceivers Embedded SERDES (multi-gigabit, protocol-dependent) —
DSP Blocks Embedded dedicated multipliers —
PLL / Clock Management Embedded PLLs —
Configuration Method SRAM-based, configuration via JTAG / passive serial / fast passive parallel —
Logic Cells — 25,660
Configurable Logic Blocks (CLBs) — 2,566
Maximum Internal Performance — 5000 MHz
Core Supply Voltage (Nominal) — 1.5 V
Core Supply Voltage Range — 1.425 V to 1.575 V
Terminal Form — Ball
Number of Terminals — 1020
Temperature Grade (suffix I5) — Industrial
Combinatorial Delay (ES variant) — 7.49 ns max
Embedded Transceivers — Present (Stratix GX family)

数据手册与资源

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