EP1SGX40DF1020C6 vs EP1SGX40F1020C6 对比

详细并排对比 EP1SGX40DF1020C6 出自 Altera 和 EP1SGX40F1020C6 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1SGX40DF1020C6 EP1SGX40DF1020C6 - Stratix GX 41,250 Cells FPGA, 624 I/O | Altera

EP1SGX40DF1020C6 - Stratix GX 41,250 Cells FPGA, 624 I/O | Altera

EP1SGX40DF1020C6 ⚠ 最后一次采购

规格对比

参数 EP1SGX40DF1020C6 EP1SGX40F1020C6
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $1,620.00 $142.00
Series Stratix GX EP1SGX40
Family Stratix GX FPGA Stratix GX
Manufacturer Altera (Intel) —
Logic Cells 41,250 —
Number of LABs/CLBs 4,125 —
Total RAM Bits [DATA_NEEDED: total RAM bits] 3,423,744
Number of I/O 624 —
Voltage - Supply 1.425 V to 1.575 V (1.5 V nominal) —
工作温度 0C to +85C (commercial) 0 C to 85 C (commercial)
封装 / 外壳 1020-BBGA, FCBGA (FC-FBGA) —
Supplier Device Package 1020-FBGA (33 x 33 mm, 1 mm pitch) —
安装类型 Surface Mount —
Process Technology 130 nm CMOS —
Maximum Internal Performance 5000 MHz (per datasheet rating) —
Logic Family CMOS, SRAM-based configuration CMOS (SRAM-based LUT)
Programmable Type In-System Programmable (SRAM) —
High-Speed Transceivers Embedded (per Stratix GX family) —
Configuration Modes JTAG, Passive Serial, Fast Passive Parallel, Active Serial —
Packaging Bulk / Tray —
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Elements — 41,250
Configurable Logic Blocks (CLBs) — 4,125
Number of I/O Pins — [DATA_NEEDED: I/O pin count]
Number of Transceivers — [DATA_NEEDED: transceiver count]
Max Transceiver Data Rate — 3.1875 Gbps
Core Voltage (VCCINT) — 1.5 V
Package Type — 1020-ball FBGA (FineLine BGA)
Package Dimensions — 33 x 33 mm
Ball Pitch — 1.00 mm
Configuration Method — SRAM-based (volatile, requires boot device)
Speed Grade — C6

数据手册与资源

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